2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
42 compatible = "arm,arm926ej-s";
48 reg = <0x70000000 0x10000000>;
52 compatible = "simple-bus";
58 compatible = "simple-bus";
63 aic: interrupt-controller@fffff000 {
64 #interrupt-cells = <3>;
65 compatible = "atmel,at91rm9200-aic";
67 reg = <0xfffff000 0x200>;
68 atmel,external-irqs = <31>;
71 ramc0: ramc@ffffe400 {
72 compatible = "atmel,at91sam9g45-ddramc";
73 reg = <0xffffe400 0x200
78 compatible = "atmel,at91rm9200-pmc";
79 reg = <0xfffffc00 0x100>;
83 compatible = "atmel,at91sam9g45-rstc";
84 reg = <0xfffffd00 0x10>;
88 compatible = "atmel,at91sam9260-pit";
89 reg = <0xfffffd30 0xf>;
95 compatible = "atmel,at91sam9rl-shdwc";
96 reg = <0xfffffd10 0x10>;
99 tcb0: timer@fff7c000 {
100 compatible = "atmel,at91rm9200-tcb";
101 reg = <0xfff7c000 0x100>;
102 interrupts = <18 4 0>;
105 tcb1: timer@fffd4000 {
106 compatible = "atmel,at91rm9200-tcb";
107 reg = <0xfffd4000 0x100>;
108 interrupts = <18 4 0>;
111 dma: dma-controller@ffffec00 {
112 compatible = "atmel,at91sam9g45-dma";
113 reg = <0xffffec00 0x200>;
114 interrupts = <21 4 0>;
119 #address-cells = <1>;
121 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
122 ranges = <0xfffff200 0xfffff200 0xa00>;
126 0xffffffff 0xffc003ff /* pioA */
127 0xffffffff 0x800f8f00 /* pioB */
128 0xffffffff 0x00000e00 /* pioC */
129 0xffffffff 0xff0c1381 /* pioD */
130 0xffffffff 0x81ffff81 /* pioE */
133 /* shared pinctrl settings */
135 pinctrl_dbgu: dbgu-0 {
137 <1 12 0x1 0x0 /* PB12 periph A */
138 1 13 0x1 0x0>; /* PB13 periph A */
143 pinctrl_usart0: usart0-0 {
145 <1 19 0x1 0x1 /* PB19 periph A with pullup */
146 1 18 0x1 0x0>; /* PB18 periph A */
149 pinctrl_usart0_rts: usart0_rts-0 {
151 <1 17 0x2 0x0>; /* PB17 periph B */
154 pinctrl_usart0_cts: usart0_cts-0 {
156 <1 15 0x2 0x0>; /* PB15 periph B */
161 pinctrl_usart1: usart1-0 {
163 <1 4 0x1 0x1 /* PB4 periph A with pullup */
164 1 5 0x1 0x0>; /* PB5 periph A */
167 pinctrl_usart1_rts: usart1_rts-0 {
169 <3 16 0x1 0x0>; /* PD16 periph A */
172 pinctrl_usart1_cts: usart1_cts-0 {
174 <3 17 0x1 0x0>; /* PD17 periph A */
179 pinctrl_usart2: usart2-0 {
181 <1 6 0x1 0x1 /* PB6 periph A with pullup */
182 1 7 0x1 0x0>; /* PB7 periph A */
185 pinctrl_usart2_rts: usart2_rts-0 {
187 <2 9 0x2 0x0>; /* PC9 periph B */
190 pinctrl_usart2_cts: usart2_cts-0 {
192 <2 11 0x2 0x0>; /* PC11 periph B */
197 pinctrl_usart3: usart3-0 {
199 <1 8 0x1 0x1 /* PB9 periph A with pullup */
200 1 9 0x1 0x0>; /* PB8 periph A */
203 pinctrl_usart3_rts: usart3_rts-0 {
205 <0 23 0x2 0x0>; /* PA23 periph B */
208 pinctrl_usart3_cts: usart3_cts-0 {
210 <0 24 0x2 0x0>; /* PA24 periph B */
215 pinctrl_nand: nand-0 {
217 <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
218 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
223 pinctrl_macb_rmii: macb_rmii-0 {
225 <0 10 0x1 0x0 /* PA10 periph A */
226 0 11 0x1 0x0 /* PA11 periph A */
227 0 12 0x1 0x0 /* PA12 periph A */
228 0 13 0x1 0x0 /* PA13 periph A */
229 0 14 0x1 0x0 /* PA14 periph A */
230 0 15 0x1 0x0 /* PA15 periph A */
231 0 16 0x1 0x0 /* PA16 periph A */
232 0 17 0x1 0x0 /* PA17 periph A */
233 0 18 0x1 0x0 /* PA18 periph A */
234 0 19 0x1 0x0>; /* PA19 periph A */
237 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
239 <0 6 0x2 0x0 /* PA6 periph B */
240 0 7 0x2 0x0 /* PA7 periph B */
241 0 8 0x2 0x0 /* PA8 periph B */
242 0 9 0x2 0x0 /* PA9 periph B */
243 0 27 0x2 0x0 /* PA27 periph B */
244 0 28 0x2 0x0 /* PA28 periph B */
245 0 29 0x2 0x0 /* PA29 periph B */
246 0 30 0x2 0x0>; /* PA30 periph B */
251 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
253 <0 0 0x1 0x0 /* PA0 periph A */
254 0 1 0x1 0x1 /* PA1 periph A with pullup */
255 0 2 0x1 0x1>; /* PA2 periph A with pullup */
258 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
260 <0 3 0x1 0x1 /* PA3 periph A with pullup */
261 0 4 0x1 0x1 /* PA4 periph A with pullup */
262 0 5 0x1 0x1>; /* PA5 periph A with pullup */
265 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
267 <0 6 0x1 0x1 /* PA6 periph A with pullup */
268 0 7 0x1 0x1 /* PA7 periph A with pullup */
269 0 8 0x1 0x1 /* PA8 periph A with pullup */
270 0 9 0x1 0x1>; /* PA9 periph A with pullup */
275 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
277 <0 31 0x1 0x0 /* PA31 periph A */
278 0 22 0x1 0x1 /* PA22 periph A with pullup */
279 0 23 0x1 0x1>; /* PA23 periph A with pullup */
282 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
284 <0 24 0x1 0x1 /* PA24 periph A with pullup */
285 0 25 0x1 0x1 /* PA25 periph A with pullup */
286 0 26 0x1 0x1>; /* PA26 periph A with pullup */
289 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
291 <0 27 0x1 0x1 /* PA27 periph A with pullup */
292 0 28 0x1 0x1 /* PA28 periph A with pullup */
293 0 29 0x1 0x1 /* PA29 periph A with pullup */
294 0 20 0x1 0x1>; /* PA30 periph A with pullup */
299 pinctrl_ssc0_tx: ssc0_tx-0 {
301 <3 0 0x1 0x0 /* PD0 periph A */
302 3 1 0x1 0x0 /* PD1 periph A */
303 3 2 0x1 0x0>; /* PD2 periph A */
306 pinctrl_ssc0_rx: ssc0_rx-0 {
308 <3 3 0x1 0x0 /* PD3 periph A */
309 3 4 0x1 0x0 /* PD4 periph A */
310 3 5 0x1 0x0>; /* PD5 periph A */
315 pinctrl_ssc1_tx: ssc1_tx-0 {
317 <3 10 0x1 0x0 /* PD10 periph A */
318 3 11 0x1 0x0 /* PD11 periph A */
319 3 12 0x1 0x0>; /* PD12 periph A */
322 pinctrl_ssc1_rx: ssc1_rx-0 {
324 <3 13 0x1 0x0 /* PD13 periph A */
325 3 14 0x1 0x0 /* PD14 periph A */
326 3 15 0x1 0x0>; /* PD15 periph A */
331 pinctrl_spi0: spi0-0 {
333 <1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */
334 1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */
335 1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */
340 pinctrl_spi1: spi1-0 {
342 <1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */
343 1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */
344 1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */
348 pioA: gpio@fffff200 {
349 compatible = "atmel,at91rm9200-gpio";
350 reg = <0xfffff200 0x200>;
351 interrupts = <2 4 1>;
354 interrupt-controller;
355 #interrupt-cells = <2>;
358 pioB: gpio@fffff400 {
359 compatible = "atmel,at91rm9200-gpio";
360 reg = <0xfffff400 0x200>;
361 interrupts = <3 4 1>;
364 interrupt-controller;
365 #interrupt-cells = <2>;
368 pioC: gpio@fffff600 {
369 compatible = "atmel,at91rm9200-gpio";
370 reg = <0xfffff600 0x200>;
371 interrupts = <4 4 1>;
374 interrupt-controller;
375 #interrupt-cells = <2>;
378 pioD: gpio@fffff800 {
379 compatible = "atmel,at91rm9200-gpio";
380 reg = <0xfffff800 0x200>;
381 interrupts = <5 4 1>;
384 interrupt-controller;
385 #interrupt-cells = <2>;
388 pioE: gpio@fffffa00 {
389 compatible = "atmel,at91rm9200-gpio";
390 reg = <0xfffffa00 0x200>;
391 interrupts = <5 4 1>;
394 interrupt-controller;
395 #interrupt-cells = <2>;
399 dbgu: serial@ffffee00 {
400 compatible = "atmel,at91sam9260-usart";
401 reg = <0xffffee00 0x200>;
402 interrupts = <1 4 7>;
403 pinctrl-names = "default";
404 pinctrl-0 = <&pinctrl_dbgu>;
408 usart0: serial@fff8c000 {
409 compatible = "atmel,at91sam9260-usart";
410 reg = <0xfff8c000 0x200>;
411 interrupts = <7 4 5>;
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_usart0>;
419 usart1: serial@fff90000 {
420 compatible = "atmel,at91sam9260-usart";
421 reg = <0xfff90000 0x200>;
422 interrupts = <8 4 5>;
425 pinctrl-names = "default";
426 pinctrl-0 = <&pinctrl_usart1>;
430 usart2: serial@fff94000 {
431 compatible = "atmel,at91sam9260-usart";
432 reg = <0xfff94000 0x200>;
433 interrupts = <9 4 5>;
436 pinctrl-names = "default";
437 pinctrl-0 = <&pinctrl_usart2>;
441 usart3: serial@fff98000 {
442 compatible = "atmel,at91sam9260-usart";
443 reg = <0xfff98000 0x200>;
444 interrupts = <10 4 5>;
447 pinctrl-names = "default";
448 pinctrl-0 = <&pinctrl_usart3>;
452 macb0: ethernet@fffbc000 {
453 compatible = "cdns,at32ap7000-macb", "cdns,macb";
454 reg = <0xfffbc000 0x100>;
455 interrupts = <25 4 3>;
456 pinctrl-names = "default";
457 pinctrl-0 = <&pinctrl_macb_rmii>;
462 compatible = "atmel,at91sam9g10-i2c";
463 reg = <0xfff84000 0x100>;
464 interrupts = <12 4 6>;
465 #address-cells = <1>;
471 compatible = "atmel,at91sam9g10-i2c";
472 reg = <0xfff88000 0x100>;
473 interrupts = <13 4 6>;
474 #address-cells = <1>;
480 compatible = "atmel,at91sam9g45-ssc";
481 reg = <0xfff9c000 0x4000>;
482 interrupts = <16 4 5>;
483 pinctrl-names = "default";
484 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
489 compatible = "atmel,at91sam9g45-ssc";
490 reg = <0xfffa0000 0x4000>;
491 interrupts = <17 4 5>;
492 pinctrl-names = "default";
493 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
498 compatible = "atmel,at91sam9260-adc";
499 reg = <0xfffb0000 0x100>;
500 interrupts = <20 4 0>;
501 atmel,adc-use-external-triggers;
502 atmel,adc-channels-used = <0xff>;
503 atmel,adc-vref = <3300>;
504 atmel,adc-num-channels = <8>;
505 atmel,adc-startup-time = <40>;
506 atmel,adc-channel-base = <0x30>;
507 atmel,adc-drdy-mask = <0x10000>;
508 atmel,adc-status-register = <0x1c>;
509 atmel,adc-trigger-register = <0x08>;
510 atmel,adc-res = <8 10>;
511 atmel,adc-res-names = "lowres", "highres";
512 atmel,adc-use-res = "highres";
515 trigger-name = "external-rising";
516 trigger-value = <0x1>;
520 trigger-name = "external-falling";
521 trigger-value = <0x2>;
526 trigger-name = "external-any";
527 trigger-value = <0x3>;
532 trigger-name = "continuous";
533 trigger-value = <0x6>;
538 compatible = "atmel,hsmci";
539 reg = <0xfff80000 0x600>;
540 interrupts = <11 4 0>;
543 #address-cells = <1>;
549 compatible = "atmel,hsmci";
550 reg = <0xfffd0000 0x600>;
551 interrupts = <29 4 0>;
554 #address-cells = <1>;
560 compatible = "atmel,at91sam9260-wdt";
561 reg = <0xfffffd40 0x10>;
566 #address-cells = <1>;
568 compatible = "atmel,at91rm9200-spi";
569 reg = <0xfffa4000 0x200>;
570 interrupts = <14 4 3>;
571 pinctrl-names = "default";
572 pinctrl-0 = <&pinctrl_spi0>;
577 #address-cells = <1>;
579 compatible = "atmel,at91rm9200-spi";
580 reg = <0xfffa8000 0x200>;
581 interrupts = <15 4 3>;
582 pinctrl-names = "default";
583 pinctrl-0 = <&pinctrl_spi1>;
588 nand0: nand@40000000 {
589 compatible = "atmel,at91rm9200-nand";
590 #address-cells = <1>;
592 reg = <0x40000000 0x10000000
595 atmel,nand-addr-offset = <21>;
596 atmel,nand-cmd-offset = <22>;
597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_nand>;
606 usb0: ohci@00700000 {
607 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
608 reg = <0x00700000 0x100000>;
609 interrupts = <22 4 2>;
613 usb1: ehci@00800000 {
614 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
615 reg = <0x00800000 0x100000>;
616 interrupts = <22 4 2>;
622 compatible = "i2c-gpio";
623 gpios = <&pioA 20 0 /* sda */
626 i2c-gpio,sda-open-drain;
627 i2c-gpio,scl-open-drain;
628 i2c-gpio,delay-us = <5>; /* ~100 kHz */
629 #address-cells = <1>;