arch/arm/boot/dts/at91rm9200.dtsi

   1 /*
   2  * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
   3  *
   4  *  Copyright (C) 2011 Atmel,
   5  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
   6  *                2012 Joachim Eastwood <manabian@gmail.com>
   7  *
   8  * Based on at91sam9260.dtsi
   9  *
  10  * Licensed under GPLv2 or later.
  11  */
  12
  13 /include/ "skeleton.dtsi"
  14
  15 / {
  16         model = "Atmel AT91RM9200 family SoC";
  17         compatible = "atmel,at91rm9200";
  18         interrupt-parent = <&aic>;
  19
  20         aliases {
  21                 serial0 = &dbgu;
  22                 serial1 = &usart0;
  23                 serial2 = &usart1;
  24                 serial3 = &usart2;
  25                 serial4 = &usart3;
  26                 gpio0 = &pioA;
  27                 gpio1 = &pioB;
  28                 gpio2 = &pioC;
  29                 gpio3 = &pioD;
  30                 tcb0 = &tcb0;
  31                 tcb1 = &tcb1;
  32                 ssc0 = &ssc0;
  33                 ssc1 = &ssc1;
  34                 ssc2 = &ssc2;
  35         };
  36         cpus {
  37                 cpu@0 {
  38                         compatible = "arm,arm920t";
  39                 };
  40         };
  41
  42         memory {
  43                 reg = <0x20000000 0x04000000>;
  44         };
  45
  46         ahb {
  47                 compatible = "simple-bus";
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 ranges;
  51
  52                 apb {
  53                         compatible = "simple-bus";
  54                         #address-cells = <1>;
  55                         #size-cells = <1>;
  56                         ranges;
  57
  58                         aic: interrupt-controller@fffff000 {
  59                                 #interrupt-cells = <3>;
  60                                 compatible = "atmel,at91rm9200-aic";
  61                                 interrupt-controller;
  62                                 reg = <0xfffff000 0x200>;
  63                                 atmel,external-irqs = <25 26 27 28 29 30 31>;
  64                         };
  65
  66                         ramc0: ramc@ffffff00 {
  67                                 compatible = "atmel,at91rm9200-sdramc";
  68                                 reg = <0xffffff00 0x100>;
  69                         };
  70
  71                         pmc: pmc@fffffc00 {
  72                                 compatible = "atmel,at91rm9200-pmc";
  73                                 reg = <0xfffffc00 0x100>;
  74                         };
  75
  76                         st: timer@fffffd00 {
  77                                 compatible = "atmel,at91rm9200-st";
  78                                 reg = <0xfffffd00 0x100>;
  79                                 interrupts = <1 4 7>;
  80                         };
  81
  82                         tcb0: timer@fffa0000 {
  83                                 compatible = "atmel,at91rm9200-tcb";
  84                                 reg = <0xfffa0000 0x100>;
  85                                 interrupts = <17 4 0 18 4 0 19 4 0>;
  86                         };
  87
  88                         tcb1: timer@fffa4000 {
  89                                 compatible = "atmel,at91rm9200-tcb";
  90                                 reg = <0xfffa4000 0x100>;
  91                                 interrupts = <20 4 0 21 4 0 22 4 0>;
  92                         };
  93
  94                         mmc0: mmc@fffb4000 {
  95                                 compatible = "atmel,hsmci";
  96                                 reg = <0xfffb4000 0x4000>;
  97                                 interrupts = <10 4 0>;
  98                                 #address-cells = <1>;
  99                                 #size-cells = <0>;
 100                                 status = "disabled";
 101                         };
 102
 103                         ssc0: ssc@fffd0000 {
 104                                 compatible = "atmel,at91rm9200-ssc";
 105                                 reg = <0xfffd0000 0x4000>;
 106                                 interrupts = <14 4 5>;
 107                                 pinctrl-names = "default";
 108                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 109                                 status = "disable";
 110                         };
 111
 112                         ssc1: ssc@fffd4000 {
 113                                 compatible = "atmel,at91rm9200-ssc";
 114                                 reg = <0xfffd4000 0x4000>;
 115                                 interrupts = <15 4 5>;
 116                                 pinctrl-names = "default";
 117                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 118                                 status = "disable";
 119                         };
 120
 121                         ssc2: ssc@fffd8000 {
 122                                 compatible = "atmel,at91rm9200-ssc";
 123                                 reg = <0xfffd8000 0x4000>;
 124                                 interrupts = <16 4 5>;
 125                                 pinctrl-names = "default";
 126                                 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
 127                                 status = "disable";
 128                         };
 129
 130                         macb0: ethernet@fffbc000 {
 131                                 compatible = "cdns,at91rm9200-emac", "cdns,emac";
 132                                 reg = <0xfffbc000 0x4000>;
 133                                 interrupts = <24 4 3>;
 134                                 phy-mode = "rmii";
 135                                 pinctrl-names = "default";
 136                                 pinctrl-0 = <&pinctrl_macb_rmii>;
 137                                 status = "disabled";
 138                         };
 139
 140                         pinctrl@fffff400 {
 141                                 #address-cells = <1>;
 142                                 #size-cells = <1>;
 143                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 144                                 ranges = <0xfffff400 0xfffff400 0x800>;
 145
 146                                 atmel,mux-mask = <
 147                                         /*    A         B     */
 148                                          0xffffffff 0xffffffff  /* pioA */
 149                                          0xffffffff 0x083fffff  /* pioB */
 150                                          0xffff3fff 0x00000000  /* pioC */
 151                                          0x03ff87ff 0x0fffff80  /* pioD */
 152                                         >;
 153
 154                                 /* shared pinctrl settings */
 155                                 dbgu {
 156                                         pinctrl_dbgu: dbgu-0 {
 157                                                 atmel,pins =
 158                                                         <0 30 0x1 0x0   /* PA30 periph A */
 159                                                          0 31 0x1 0x1>; /* PA31 periph with pullup */
 160                                         };
 161                                 };
 162
 163                                 uart0 {
 164                                         pinctrl_uart0: uart0-0 {
 165                                                 atmel,pins =
 166                                                         <0 17 0x1 0x0   /* PA17 periph A */
 167                                                          0 18 0x1 0x0>; /* PA18 periph A */
 168                                         };
 169
 170                                         pinctrl_uart0_rts: uart0_rts-0 {
 171                                                 atmel,pins =
 172                                                         <0 20 0x1 0x0>; /* PA20 periph A */
 173                                         };
 174
 175                                         pinctrl_uart0_cts: uart0_cts-0 {
 176                                                 atmel,pins =
 177                                                         <0 21 0x1 0x0>; /* PA21 periph A */
 178                                         };
 179                                 };
 180
 181                                 uart1 {
 182                                         pinctrl_uart1: uart1-0 {
 183                                                 atmel,pins =
 184                                                         <1 20 0x1 0x1   /* PB20 periph A with pullup */
 185                                                          1 21 0x1 0x0>; /* PB21 periph A */
 186                                         };
 187
 188                                         pinctrl_uart1_rts: uart1_rts-0 {
 189                                                 atmel,pins =
 190                                                         <1 24 0x1 0x0>; /* PB24 periph A */
 191                                         };
 192
 193                                         pinctrl_uart1_cts: uart1_cts-0 {
 194                                                 atmel,pins =
 195                                                         <1 26 0x1 0x0>; /* PB26 periph A */
 196                                         };
 197
 198                                         pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
 199                                                 atmel,pins =
 200                                                         <1 19 0x1 0x0   /* PB19 periph A */
 201                                                          1 25 0x1 0x0>; /* PB25 periph A */
 202                                         };
 203
 204                                         pinctrl_uart1_dcd: uart1_dcd-0 {
 205                                                 atmel,pins =
 206                                                         <1 23 0x1 0x0>; /* PB23 periph A */
 207                                         };
 208
 209                                         pinctrl_uart1_ri: uart1_ri-0 {
 210                                                 atmel,pins =
 211                                                         <1 18 0x1 0x0>; /* PB18 periph A */
 212                                         };
 213                                 };
 214
 215                                 uart2 {
 216                                         pinctrl_uart2: uart2-0 {
 217                                                 atmel,pins =
 218                                                         <0 22 0x1 0x0   /* PA22 periph A */
 219                                                          0 23 0x1 0x1>; /* PA23 periph A with pullup */
 220                                         };
 221
 222                                         pinctrl_uart2_rts: uart2_rts-0 {
 223                                                 atmel,pins =
 224                                                         <0 30 0x2 0x0>; /* PA30 periph B */
 225                                         };
 226
 227                                         pinctrl_uart2_cts: uart2_cts-0 {
 228                                                 atmel,pins =
 229                                                         <0 31 0x2 0x0>; /* PA31 periph B */
 230                                         };
 231                                 };
 232
 233                                 uart3 {
 234                                         pinctrl_uart3: uart3-0 {
 235                                                 atmel,pins =
 236                                                         <0 5 0x2 0x1    /* PA5 periph B with pullup */
 237                                                          0 6 0x2 0x0>;  /* PA6 periph B */
 238                                         };
 239
 240                                         pinctrl_uart3_rts: uart3_rts-0 {
 241                                                 atmel,pins =
 242                                                         <1 0 0x2 0x0>;  /* PB0 periph B */
 243                                         };
 244
 245                                         pinctrl_uart3_cts: uart3_cts-0 {
 246                                                 atmel,pins =
 247                                                         <1 1 0x2 0x0>;  /* PB1 periph B */
 248                                         };
 249                                 };
 250
 251                                 nand {
 252                                         pinctrl_nand: nand-0 {
 253                                                 atmel,pins =
 254                                                         <2 2 0x0 0x1    /* PC2 gpio RDY pin pull_up */
 255                                                          1 1 0x0 0x1>;  /* PB1 gpio CD pin pull_up */
 256                                         };
 257                                 };
 258
 259                                 macb {
 260                                         pinctrl_macb_rmii: macb_rmii-0 {
 261                                                 atmel,pins =
 262                                                         <0 7 0x1 0x0    /* PA7 periph A */
 263                                                          0 8 0x1 0x0    /* PA8 periph A */
 264                                                          0 9 0x1 0x0    /* PA9 periph A */
 265                                                          0 10 0x1 0x0   /* PA10 periph A */
 266                                                          0 11 0x1 0x0   /* PA11 periph A */
 267                                                          0 12 0x1 0x0   /* PA12 periph A */
 268                                                          0 13 0x1 0x0   /* PA13 periph A */
 269                                                          0 14 0x1 0x0   /* PA14 periph A */
 270                                                          0 15 0x1 0x0   /* PA15 periph A */
 271                                                          0 16 0x1 0x0>; /* PA16 periph A */
 272                                         };
 273
 274                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 275                                                 atmel,pins =
 276                                                         <1 12 0x2 0x0   /* PB12 periph B */
 277                                                          1 13 0x2 0x0   /* PB13 periph B */
 278                                                          1 14 0x2 0x0   /* PB14 periph B */
 279                                                          1 15 0x2 0x0   /* PB15 periph B */
 280                                                          1 16 0x2 0x0   /* PB16 periph B */
 281                                                          1 17 0x2 0x0   /* PB17 periph B */
 282                                                          1 18 0x2 0x0   /* PB18 periph B */
 283                                                          1 19 0x2 0x0>; /* PB19 periph B */
 284                                         };
 285                                 };
 286
 287                                 mmc0 {
 288                                         pinctrl_mmc0_clk: mmc0_clk-0 {
 289                                                 atmel,pins =
 290                                                         <0 27 0x1 0x0>; /* PA27 periph A */
 291                                         };
 292
 293                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
 294                                                 atmel,pins =
 295                                                         <0 28 0x1 0x1   /* PA28 periph A with pullup */
 296                                                          0 29 0x1 0x1>; /* PA29 periph A with pullup */
 297                                         };
 298
 299                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 300                                                 atmel,pins =
 301                                                         <1 3 0x2 0x1    /* PB3 periph B with pullup */
 302                                                          1 4 0x2 0x1    /* PB4 periph B with pullup */
 303                                                          1 5 0x2 0x1>;  /* PB5 periph B with pullup */
 304                                         };
 305
 306                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
 307                                                 atmel,pins =
 308                                                         <0 8 0x2 0x1    /* PA8 periph B with pullup */
 309                                                          0 9 0x2 0x1>;  /* PA9 periph B with pullup */
 310                                         };
 311
 312                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
 313                                                 atmel,pins =
 314                                                         <0 10 0x2 0x1   /* PA10 periph B with pullup */
 315                                                          0 11 0x2 0x1   /* PA11 periph B with pullup */
 316                                                          0 12 0x2 0x1>; /* PA12 periph B with pullup */
 317                                         };
 318                                 };
 319
 320                                 ssc0 {
 321                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 322                                                 atmel,pins =
 323                                                         <1 0 0x1 0x0    /* PB0 periph A */
 324                                                          1 1 0x1 0x0    /* PB1 periph A */
 325                                                          1 2 0x1 0x0>;  /* PB2 periph A */
 326                                         };
 327
 328                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 329                                                 atmel,pins =
 330                                                         <1 3 0x1 0x0    /* PB3 periph A */
 331                                                          1 4 0x1 0x0    /* PB4 periph A */
 332                                                          1 5 0x1 0x0>;  /* PB5 periph A */
 333                                         };
 334                                 };
 335
 336                                 ssc1 {
 337                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 338                                                 atmel,pins =
 339                                                         <1 6 0x1 0x0    /* PB6 periph A */
 340                                                          1 7 0x1 0x0    /* PB7 periph A */
 341                                                          1 8 0x1 0x0>;  /* PB8 periph A */
 342                                         };
 343
 344                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 345                                                 atmel,pins =
 346                                                         <1 9 0x1 0x0    /* PB9 periph A */
 347                                                          1 10 0x1 0x0   /* PB10 periph A */
 348                                                          1 11 0x1 0x0>; /* PB11 periph A */
 349                                         };
 350                                 };
 351
 352                                 ssc2 {
 353                                         pinctrl_ssc2_tx: ssc2_tx-0 {
 354                                                 atmel,pins =
 355                                                         <1 12 0x1 0x0   /* PB12 periph A */
 356                                                          1 13 0x1 0x0   /* PB13 periph A */
 357                                                          1 14 0x1 0x0>; /* PB14 periph A */
 358                                         };
 359
 360                                         pinctrl_ssc2_rx: ssc2_rx-0 {
 361                                                 atmel,pins =
 362                                                         <1 15 0x1 0x0   /* PB15 periph A */
 363                                                          1 16 0x1 0x0   /* PB16 periph A */
 364                                                          1 17 0x1 0x0>; /* PB17 periph A */
 365                                         };
 366                                 };
 367
 368                                 pioA: gpio@fffff400 {
 369                                         compatible = "atmel,at91rm9200-gpio";
 370                                         reg = <0xfffff400 0x200>;
 371                                         interrupts = <2 4 1>;
 372                                         #gpio-cells = <2>;
 373                                         gpio-controller;
 374                                         interrupt-controller;
 375                                         #interrupt-cells = <2>;
 376                                 };
 377
 378                                 pioB: gpio@fffff600 {
 379                                         compatible = "atmel,at91rm9200-gpio";
 380                                         reg = <0xfffff600 0x200>;
 381                                         interrupts = <3 4 1>;
 382                                         #gpio-cells = <2>;
 383                                         gpio-controller;
 384                                         interrupt-controller;
 385                                         #interrupt-cells = <2>;
 386                                 };
 387
 388                                 pioC: gpio@fffff800 {
 389                                         compatible = "atmel,at91rm9200-gpio";
 390                                         reg = <0xfffff800 0x200>;
 391                                         interrupts = <4 4 1>;
 392                                         #gpio-cells = <2>;
 393                                         gpio-controller;
 394                                         interrupt-controller;
 395                                         #interrupt-cells = <2>;
 396                                 };
 397
 398                                 pioD: gpio@fffffa00 {
 399                                         compatible = "atmel,at91rm9200-gpio";
 400                                         reg = <0xfffffa00 0x200>;
 401                                         interrupts = <5 4 1>;
 402                                         #gpio-cells = <2>;
 403                                         gpio-controller;
 404                                         interrupt-controller;
 405                                         #interrupt-cells = <2>;
 406                                 };
 407                         };
 408
 409                         dbgu: serial@fffff200 {
 410                                 compatible = "atmel,at91rm9200-usart";
 411                                 reg = <0xfffff200 0x200>;
 412                                 interrupts = <1 4 7>;
 413                                 pinctrl-names = "default";
 414                                 pinctrl-0 = <&pinctrl_dbgu>;
 415                                 status = "disabled";
 416                         };
 417
 418                         usart0: serial@fffc0000 {
 419                                 compatible = "atmel,at91rm9200-usart";
 420                                 reg = <0xfffc0000 0x200>;
 421                                 interrupts = <6 4 5>;
 422                                 atmel,use-dma-rx;
 423                                 atmel,use-dma-tx;
 424                                 pinctrl-names = "default";
 425                                 pinctrl-0 = <&pinctrl_uart0>;
 426                                 status = "disabled";
 427                         };
 428
 429                         usart1: serial@fffc4000 {
 430                                 compatible = "atmel,at91rm9200-usart";
 431                                 reg = <0xfffc4000 0x200>;
 432                                 interrupts = <7 4 5>;
 433                                 atmel,use-dma-rx;
 434                                 atmel,use-dma-tx;
 435                                 pinctrl-names = "default";
 436                                 pinctrl-0 = <&pinctrl_uart1>;
 437                                 status = "disabled";
 438                         };
 439
 440                         usart2: serial@fffc8000 {
 441                                 compatible = "atmel,at91rm9200-usart";
 442                                 reg = <0xfffc8000 0x200>;
 443                                 interrupts = <8 4 5>;
 444                                 atmel,use-dma-rx;
 445                                 atmel,use-dma-tx;
 446                                 pinctrl-names = "default";
 447                                 pinctrl-0 = <&pinctrl_uart2>;
 448                                 status = "disabled";
 449                         };
 450
 451                         usart3: serial@fffcc000 {
 452                                 compatible = "atmel,at91rm9200-usart";
 453                                 reg = <0xfffcc000 0x200>;
 454                                 interrupts = <23 4 5>;
 455                                 atmel,use-dma-rx;
 456                                 atmel,use-dma-tx;
 457                                 pinctrl-names = "default";
 458                                 pinctrl-0 = <&pinctrl_uart3>;
 459                                 status = "disabled";
 460                         };
 461
 462                         usb1: gadget@fffb0000 {
 463                                 compatible = "atmel,at91rm9200-udc";
 464                                 reg = <0xfffb0000 0x4000>;
 465                                 interrupts = <11 4 2>;
 466                                 status = "disabled";
 467                         };
 468                 };
 469
 470                 nand0: nand@40000000 {
 471                         compatible = "atmel,at91rm9200-nand";
 472                         #address-cells = <1>;
 473                         #size-cells = <1>;
 474                         reg = <0x40000000 0x10000000>;
 475                         atmel,nand-addr-offset = <21>;
 476                         atmel,nand-cmd-offset = <22>;
 477                         pinctrl-names = "default";
 478                         pinctrl-0 = <&pinctrl_nand>;
 479                         nand-ecc-mode = "soft";
 480                         gpios = <&pioC 2 0
 481                                  0
 482                                  &pioB 1 0
 483                                 >;
 484                         status = "disabled";
 485                 };
 486
 487                 usb0: ohci@00300000 {
 488                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 489                         reg = <0x00300000 0x100000>;
 490                         interrupts = <23 4 2>;
 491                         status = "disabled";
 492                 };
 493         };
 494
 495         i2c@0 {
 496                 compatible = "i2c-gpio";
 497                 gpios = <&pioA 25 0 /* sda */
 498                          &pioA 26 0 /* scl */
 499                         >;
 500                 i2c-gpio,sda-open-drain;
 501                 i2c-gpio,scl-open-drain;
 502                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 503                 #address-cells = <1>;
 504                 #size-cells = <0>;
 505                 status = "disabled";
 506         };
 507 };