2 * Device Tree Include file for Marvell Armada XP family SoC
4 * Copyright (C) 2012 Marvell
6 * Lior Amsalem <alior@marvell.com>
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Ben Dooks <ben.dooks@codethink.co.uk>
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
15 * Contains definitions specific to the Armada XP SoC that are not
16 * common to all Armada SoCs.
19 #include "armada-370-xp.dtsi"
22 model = "Marvell Armada XP family SoC";
23 compatible = "marvell,armadaxp", "marvell,armada-370-xp";
30 compatible = "marvell,armadaxp-mbus", "simple-bus";
33 compatible = "marvell,bootrom";
34 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
39 compatible = "marvell,aurora-system-cache";
40 reg = <0x08000 0x1000>;
41 cache-id-part = <0x100>;
46 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
47 reg = <0x11000 0x100>;
51 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
52 reg = <0x11100 0x100>;
56 compatible = "snps,dw-apb-uart";
57 reg = <0x12200 0x100>;
64 compatible = "snps,dw-apb-uart";
65 reg = <0x12300 0x100>;
72 system-controller@18200 {
73 compatible = "marvell,armada-370-xp-system-controller";
74 reg = <0x18200 0x500>;
77 gateclk: clock-gating-control@18220 {
78 compatible = "marvell,armada-xp-gating-clock";
80 clocks = <&coreclk 0>;
84 coreclk: mvebu-sar@18230 {
85 compatible = "marvell,armada-xp-core-clock";
91 compatible = "marvell,armadaxp-thermal";
97 cpuclk: clock-complex@18700 {
99 compatible = "marvell,armada-xp-cpu-clock";
100 reg = <0x18700 0xA0>;
101 clocks = <&coreclk 1>;
104 interrupt-controller@20000 {
105 reg = <0x20a00 0x2d0>, <0x21070 0x58>;
109 compatible = "marvell,armada-xp-timer";
110 clocks = <&coreclk 2>, <&refclk>;
111 clock-names = "nbclk", "fixed";
115 compatible = "marvell,armada-xp-wdt";
116 clocks = <&coreclk 2>, <&refclk>;
117 clock-names = "nbclk", "fixed";
120 armada-370-xp-pmsu@22000 {
121 compatible = "marvell,armada-370-xp-pmsu";
122 reg = <0x22100 0x400>, <0x20800 0x20>;
125 eth2: ethernet@30000 {
126 compatible = "marvell,armada-370-neta";
127 reg = <0x30000 0x4000>;
129 clocks = <&gateclk 2>;
134 clocks = <&gateclk 18>;
138 clocks = <&gateclk 19>;
142 compatible = "marvell,orion-ehci";
143 reg = <0x52000 0x500>;
145 clocks = <&gateclk 20>;
150 compatible = "marvell,orion-xor";
153 clocks = <&gateclk 22>;
170 compatible = "marvell,orion-xor";
173 clocks = <&gateclk 28>;
192 /* 25 MHz reference crystal */
194 compatible = "fixed-clock";
196 clock-frequency = <25000000>;