arch/arm/boot/dts/armada-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada XP family SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is licensed under the terms of the GNU General Public
  12  * License version 2.  This program is licensed "as is" without any
  13  * warranty of any kind, whether express or implied.
  14  *
  15  * Contains definitions specific to the Armada XP SoC that are not
  16  * common to all Armada SoCs.
  17  */
  18
  19 #include "armada-370-xp.dtsi"
  20
  21 / {
  22         model = "Marvell Armada XP family SoC";
  23         compatible = "marvell,armadaxp", "marvell,armada-370-xp";
  24
  25         aliases {
  26                 eth2 = &eth2;
  27         };
  28
  29         soc {
  30                 compatible = "marvell,armadaxp-mbus", "simple-bus";
  31
  32                 bootrom {
  33                         compatible = "marvell,bootrom";
  34                         reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
  35                 };
  36
  37                 internal-regs {
  38                         L2: l2-cache {
  39                                 compatible = "marvell,aurora-system-cache";
  40                                 reg = <0x08000 0x1000>;
  41                                 cache-id-part = <0x100>;
  42                                 cache-unified;
  43                                 wt-override;
  44                         };
  45
  46                         i2c0: i2c@11000 {
  47                                 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  48                                 reg = <0x11000 0x100>;
  49                         };
  50
  51                         i2c1: i2c@11100 {
  52                                 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  53                                 reg = <0x11100 0x100>;
  54                         };
  55
  56                         uart2: serial@12200 {
  57                                 compatible = "snps,dw-apb-uart";
  58                                 pinctrl-0 = <&uart2_pins>;
  59                                 pinctrl-names = "default";
  60                                 reg = <0x12200 0x100>;
  61                                 reg-shift = <2>;
  62                                 interrupts = <43>;
  63                                 reg-io-width = <1>;
  64                                 clocks = <&coreclk 0>;
  65                                 status = "disabled";
  66                         };
  67
  68                         uart3: serial@12300 {
  69                                 compatible = "snps,dw-apb-uart";
  70                                 pinctrl-0 = <&uart3_pins>;
  71                                 pinctrl-names = "default";
  72                                 reg = <0x12300 0x100>;
  73                                 reg-shift = <2>;
  74                                 interrupts = <44>;
  75                                 reg-io-width = <1>;
  76                                 clocks = <&coreclk 0>;
  77                                 status = "disabled";
  78                         };
  79
  80                         system-controller@18200 {
  81                                 compatible = "marvell,armada-370-xp-system-controller";
  82                                 reg = <0x18200 0x500>;
  83                         };
  84
  85                         gateclk: clock-gating-control@18220 {
  86                                 compatible = "marvell,armada-xp-gating-clock";
  87                                 reg = <0x18220 0x4>;
  88                                 clocks = <&coreclk 0>;
  89                                 #clock-cells = <1>;
  90                         };
  91
  92                         coreclk: mvebu-sar@18230 {
  93                                 compatible = "marvell,armada-xp-core-clock";
  94                                 reg = <0x18230 0x08>;
  95                                 #clock-cells = <1>;
  96                         };
  97
  98                         thermal@182b0 {
  99                                 compatible = "marvell,armadaxp-thermal";
 100                                 reg = <0x182b0 0x4
 101                                         0x184d0 0x4>;
 102                                 status = "okay";
 103                         };
 104
 105                         cpuclk: clock-complex@18700 {
 106                                 #clock-cells = <1>;
 107                                 compatible = "marvell,armada-xp-cpu-clock";
 108                                 reg = <0x18700 0xA0>, <0x1c054 0x10>;
 109                                 clocks = <&coreclk 1>;
 110                         };
 111
 112                         interrupt-controller@20000 {
 113                               reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 114                         };
 115
 116                         timer@20300 {
 117                                 compatible = "marvell,armada-xp-timer";
 118                                 clocks = <&coreclk 2>, <&refclk>;
 119                                 clock-names = "nbclk", "fixed";
 120                         };
 121
 122                         watchdog@20300 {
 123                                 compatible = "marvell,armada-xp-wdt";
 124                                 clocks = <&coreclk 2>, <&refclk>;
 125                                 clock-names = "nbclk", "fixed";
 126                         };
 127
 128                         cpurst@20800 {
 129                                 compatible = "marvell,armada-370-cpu-reset";
 130                                 reg = <0x20800 0x20>;
 131                         };
 132
 133                         eth2: ethernet@30000 {
 134                                 compatible = "marvell,armada-370-neta";
 135                                 reg = <0x30000 0x4000>;
 136                                 interrupts = <12>;
 137                                 clocks = <&gateclk 2>;
 138                                 status = "disabled";
 139                         };
 140
 141                         usb@50000 {
 142                                 clocks = <&gateclk 18>;
 143                         };
 144
 145                         usb@51000 {
 146                                 clocks = <&gateclk 19>;
 147                         };
 148
 149                         usb@52000 {
 150                                 compatible = "marvell,orion-ehci";
 151                                 reg = <0x52000 0x500>;
 152                                 interrupts = <47>;
 153                                 clocks = <&gateclk 20>;
 154                                 status = "disabled";
 155                         };
 156
 157                         xor@60900 {
 158                                 compatible = "marvell,orion-xor";
 159                                 reg = <0x60900 0x100
 160                                        0x60b00 0x100>;
 161                                 clocks = <&gateclk 22>;
 162                                 status = "okay";
 163
 164                                 xor10 {
 165                                         interrupts = <51>;
 166                                         dmacap,memcpy;
 167                                         dmacap,xor;
 168                                 };
 169                                 xor11 {
 170                                         interrupts = <52>;
 171                                         dmacap,memcpy;
 172                                         dmacap,xor;
 173                                         dmacap,memset;
 174                                 };
 175                         };
 176
 177                         xor@f0900 {
 178                                 compatible = "marvell,orion-xor";
 179                                 reg = <0xF0900 0x100
 180                                        0xF0B00 0x100>;
 181                                 clocks = <&gateclk 28>;
 182                                 status = "okay";
 183
 184                                 xor00 {
 185                                         interrupts = <94>;
 186                                         dmacap,memcpy;
 187                                         dmacap,xor;
 188                                 };
 189                                 xor01 {
 190                                         interrupts = <95>;
 191                                         dmacap,memcpy;
 192                                         dmacap,xor;
 193                                         dmacap,memset;
 194                                 };
 195                         };
 196                 };
 197         };
 198
 199         clocks {
 200                 /* 25 MHz reference crystal */
 201                 refclk: oscillator {
 202                         compatible = "fixed-clock";
 203                         #clock-cells = <0>;
 204                         clock-frequency = <25000000>;
 205                 };
 206         };
 207 };
 208
 209 &pinctrl {
 210         pmx_ge0_gmii: pmx-ge0-gmii {
 211                 marvell,pins =
 212                      "mpp0",  "mpp1",  "mpp2",  "mpp3",
 213                      "mpp4",  "mpp5",  "mpp6",  "mpp7",
 214                      "mpp8",  "mpp9",  "mpp10", "mpp11",
 215                      "mpp12", "mpp13", "mpp14", "mpp15",
 216                      "mpp16", "mpp17", "mpp18", "mpp19",
 217                      "mpp20", "mpp21", "mpp22", "mpp23";
 218                 marvell,function = "ge0";
 219         };
 220
 221         pmx_ge0_rgmii: pmx-ge0-rgmii {
 222                 marvell,pins =
 223                      "mpp0", "mpp1", "mpp2", "mpp3",
 224                      "mpp4", "mpp5", "mpp6", "mpp7",
 225                      "mpp8", "mpp9", "mpp10", "mpp11";
 226                 marvell,function = "ge0";
 227         };
 228
 229         pmx_ge1_rgmii: pmx-ge1-rgmii {
 230                 marvell,pins =
 231                      "mpp12", "mpp13", "mpp14", "mpp15",
 232                      "mpp16", "mpp17", "mpp18", "mpp19",
 233                      "mpp20", "mpp21", "mpp22", "mpp23";
 234                 marvell,function = "ge1";
 235         };
 236
 237         sdio_pins: sdio-pins {
 238                 marvell,pins = "mpp30", "mpp31", "mpp32",
 239                                "mpp33", "mpp34", "mpp35";
 240                 marvell,function = "sd0";
 241         };
 242
 243         uart2_pins: uart2-pins {
 244                 marvell,pins = "mpp42", "mpp43";
 245                 marvell,function = "uart2";
 246         };
 247
 248         uart3_pins: uart3-pins {
 249                 marvell,pins = "mpp44", "mpp45";
 250                 marvell,function = "uart3";
 251         };
 252 };