arch/arm/boot/dts/armada-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada XP family SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is licensed under the terms of the GNU General Public
  12  * License version 2.  This program is licensed "as is" without any
  13  * warranty of any kind, whether express or implied.
  14  *
  15  * Contains definitions specific to the Armada XP SoC that are not
  16  * common to all Armada SoCs.
  17  */
  18
  19 #include "armada-370-xp.dtsi"
  20
  21 / {
  22         model = "Marvell Armada XP family SoC";
  23         compatible = "marvell,armadaxp", "marvell,armada-370-xp";
  24
  25         aliases {
  26                 eth2 = &eth2;
  27         };
  28
  29         soc {
  30                 compatible = "marvell,armadaxp-mbus", "simple-bus";
  31
  32                 bootrom {
  33                         compatible = "marvell,bootrom";
  34                         reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
  35                 };
  36
  37                 internal-regs {
  38                         sdramc@1400 {
  39                                 compatible = "marvell,armada-xp-sdram-controller";
  40                                 reg = <0x1400 0x500>;
  41                         };
  42
  43                         L2: l2-cache {
  44                                 compatible = "marvell,aurora-system-cache";
  45                                 reg = <0x08000 0x1000>;
  46                                 cache-id-part = <0x100>;
  47                                 cache-unified;
  48                                 wt-override;
  49                         };
  50
  51                         spi0: spi@10600 {
  52                                 pinctrl-0 = <&spi0_pins>;
  53                                 pinctrl-names = "default";
  54                         };
  55
  56                         i2c0: i2c@11000 {
  57                                 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  58                                 reg = <0x11000 0x100>;
  59                         };
  60
  61                         i2c1: i2c@11100 {
  62                                 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  63                                 reg = <0x11100 0x100>;
  64                         };
  65
  66                         uart2: serial@12200 {
  67                                 compatible = "snps,dw-apb-uart";
  68                                 pinctrl-0 = <&uart2_pins>;
  69                                 pinctrl-names = "default";
  70                                 reg = <0x12200 0x100>;
  71                                 reg-shift = <2>;
  72                                 interrupts = <43>;
  73                                 reg-io-width = <1>;
  74                                 clocks = <&coreclk 0>;
  75                                 status = "disabled";
  76                         };
  77
  78                         uart3: serial@12300 {
  79                                 compatible = "snps,dw-apb-uart";
  80                                 pinctrl-0 = <&uart3_pins>;
  81                                 pinctrl-names = "default";
  82                                 reg = <0x12300 0x100>;
  83                                 reg-shift = <2>;
  84                                 interrupts = <44>;
  85                                 reg-io-width = <1>;
  86                                 clocks = <&coreclk 0>;
  87                                 status = "disabled";
  88                         };
  89
  90                         system-controller@18200 {
  91                                 compatible = "marvell,armada-370-xp-system-controller";
  92                                 reg = <0x18200 0x500>;
  93                         };
  94
  95                         gateclk: clock-gating-control@18220 {
  96                                 compatible = "marvell,armada-xp-gating-clock";
  97                                 reg = <0x18220 0x4>;
  98                                 clocks = <&coreclk 0>;
  99                                 #clock-cells = <1>;
 100                         };
 101
 102                         coreclk: mvebu-sar@18230 {
 103                                 compatible = "marvell,armada-xp-core-clock";
 104                                 reg = <0x18230 0x08>;
 105                                 #clock-cells = <1>;
 106                         };
 107
 108                         thermal@182b0 {
 109                                 compatible = "marvell,armadaxp-thermal";
 110                                 reg = <0x182b0 0x4
 111                                         0x184d0 0x4>;
 112                                 status = "okay";
 113                         };
 114
 115                         cpuclk: clock-complex@18700 {
 116                                 #clock-cells = <1>;
 117                                 compatible = "marvell,armada-xp-cpu-clock";
 118                                 reg = <0x18700 0xA0>, <0x1c054 0x10>;
 119                                 clocks = <&coreclk 1>;
 120                         };
 121
 122                         interrupt-controller@20000 {
 123                               reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 124                         };
 125
 126                         timer@20300 {
 127                                 compatible = "marvell,armada-xp-timer";
 128                                 clocks = <&coreclk 2>, <&refclk>;
 129                                 clock-names = "nbclk", "fixed";
 130                         };
 131
 132                         watchdog@20300 {
 133                                 compatible = "marvell,armada-xp-wdt";
 134                                 clocks = <&coreclk 2>, <&refclk>;
 135                                 clock-names = "nbclk", "fixed";
 136                         };
 137
 138                         cpurst@20800 {
 139                                 compatible = "marvell,armada-370-cpu-reset";
 140                                 reg = <0x20800 0x20>;
 141                         };
 142
 143                         eth2: ethernet@30000 {
 144                                 compatible = "marvell,armada-370-neta";
 145                                 reg = <0x30000 0x4000>;
 146                                 interrupts = <12>;
 147                                 clocks = <&gateclk 2>;
 148                                 status = "disabled";
 149                         };
 150
 151                         usb@50000 {
 152                                 clocks = <&gateclk 18>;
 153                         };
 154
 155                         usb@51000 {
 156                                 clocks = <&gateclk 19>;
 157                         };
 158
 159                         usb@52000 {
 160                                 compatible = "marvell,orion-ehci";
 161                                 reg = <0x52000 0x500>;
 162                                 interrupts = <47>;
 163                                 clocks = <&gateclk 20>;
 164                                 status = "disabled";
 165                         };
 166
 167                         xor@60900 {
 168                                 compatible = "marvell,orion-xor";
 169                                 reg = <0x60900 0x100
 170                                        0x60b00 0x100>;
 171                                 clocks = <&gateclk 22>;
 172                                 status = "okay";
 173
 174                                 xor10 {
 175                                         interrupts = <51>;
 176                                         dmacap,memcpy;
 177                                         dmacap,xor;
 178                                 };
 179                                 xor11 {
 180                                         interrupts = <52>;
 181                                         dmacap,memcpy;
 182                                         dmacap,xor;
 183                                         dmacap,memset;
 184                                 };
 185                         };
 186
 187                         xor@f0900 {
 188                                 compatible = "marvell,orion-xor";
 189                                 reg = <0xF0900 0x100
 190                                        0xF0B00 0x100>;
 191                                 clocks = <&gateclk 28>;
 192                                 status = "okay";
 193
 194                                 xor00 {
 195                                         interrupts = <94>;
 196                                         dmacap,memcpy;
 197                                         dmacap,xor;
 198                                 };
 199                                 xor01 {
 200                                         interrupts = <95>;
 201                                         dmacap,memcpy;
 202                                         dmacap,xor;
 203                                         dmacap,memset;
 204                                 };
 205                         };
 206                 };
 207         };
 208
 209         clocks {
 210                 /* 25 MHz reference crystal */
 211                 refclk: oscillator {
 212                         compatible = "fixed-clock";
 213                         #clock-cells = <0>;
 214                         clock-frequency = <25000000>;
 215                 };
 216         };
 217 };
 218
 219 &pinctrl {
 220         ge0_gmii_pins: ge0-gmii-pins {
 221                 marvell,pins =
 222                      "mpp0",  "mpp1",  "mpp2",  "mpp3",
 223                      "mpp4",  "mpp5",  "mpp6",  "mpp7",
 224                      "mpp8",  "mpp9",  "mpp10", "mpp11",
 225                      "mpp12", "mpp13", "mpp14", "mpp15",
 226                      "mpp16", "mpp17", "mpp18", "mpp19",
 227                      "mpp20", "mpp21", "mpp22", "mpp23";
 228                 marvell,function = "ge0";
 229         };
 230
 231         ge0_rgmii_pins: ge0-rgmii-pins {
 232                 marvell,pins =
 233                      "mpp0", "mpp1", "mpp2", "mpp3",
 234                      "mpp4", "mpp5", "mpp6", "mpp7",
 235                      "mpp8", "mpp9", "mpp10", "mpp11";
 236                 marvell,function = "ge0";
 237         };
 238
 239         ge1_rgmii_pins: ge1-rgmii-pins {
 240                 marvell,pins =
 241                      "mpp12", "mpp13", "mpp14", "mpp15",
 242                      "mpp16", "mpp17", "mpp18", "mpp19",
 243                      "mpp20", "mpp21", "mpp22", "mpp23";
 244                 marvell,function = "ge1";
 245         };
 246
 247         sdio_pins: sdio-pins {
 248                 marvell,pins = "mpp30", "mpp31", "mpp32",
 249                                "mpp33", "mpp34", "mpp35";
 250                 marvell,function = "sd0";
 251         };
 252
 253         spi0_pins: spi0-pins {
 254                 marvell,pins = "mpp36", "mpp37",
 255                                "mpp38", "mpp39";
 256                 marvell,function = "spi";
 257         };
 258
 259         uart2_pins: uart2-pins {
 260                 marvell,pins = "mpp42", "mpp43";
 261                 marvell,function = "uart2";
 262         };
 263
 264         uart3_pins: uart3-pins {
 265                 marvell,pins = "mpp44", "mpp45";
 266                 marvell,function = "uart3";
 267         };
 268 };