2 * Device Tree file for Marvell RD-AXPWiFiAP.
4 * Note: this board is shipped with a new generation boot loader that
5 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
6 * is used, the CONFIG_DEBUG_MVEBU_UART_ALTERNATE option should be
9 * Copyright (C) 2013 Marvell
11 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 * This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without any
15 * warranty of any kind, whether express or implied.
19 #include <dt-bindings/gpio/gpio.h>
20 #include <dt-bindings/input/input.h>
21 #include "armada-xp-mv78230.dtsi"
24 model = "Marvell RD-AXPWiFiAP";
25 compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
28 bootargs = "console=ttyS0,115200 earlyprintk";
32 device_type = "memory";
33 reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */
37 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
38 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
43 /* First mini-PCIe port */
49 /* Second mini-PCIe port */
55 /* Renesas uPD720202 USB 3.0 controller */
77 phy0: ethernet-phy@0 {
81 phy1: ethernet-phy@1 {
87 pinctrl-0 = <&ge0_rgmii_pins>;
88 pinctrl-names = "default";
91 phy-mode = "rgmii-id";
94 pinctrl-0 = <&ge1_rgmii_pins>;
95 pinctrl-names = "default";
98 phy-mode = "rgmii-id";
105 #address-cells = <1>;
107 compatible = "n25q128a13";
108 reg = <0>; /* Chip select 0 */
109 spi-max-frequency = <108000000>;
116 compatible = "gpio-keys";
117 #address-cells = <1>;
119 pinctrl-0 = <&keys_pin>;
120 pinctrl-names = "default";
123 label = "Factory Reset Button";
124 linux,code = <KEY_SETUP>;
125 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
131 pinctrl-0 = <&phy_int_pin>;
132 pinctrl-names = "default";
135 marvell,pins = "mpp33";
136 marvell,function = "gpio";
139 phy_int_pin: phy-int-pin {
140 marvell,pins = "mpp32";
141 marvell,function = "gpio";