arch/arm/boot/dts/armada-38x.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada 38x family of SoCs.
   3  *
   4  * Copyright (C) 2014 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  *
  10  * This file is dual-licensed: you can use it either under the terms
  11  * of the GPL or the X11 license, at your option. Note that this dual
  12  * licensing only applies to this file, and not this project as a
  13  * whole.
  14  *
  15  *  a) This file is free software; you can redistribute it and/or
  16  *     modify it under the terms of the GNU General Public License as
  17  *     published by the Free Software Foundation; either version 2 of the
  18  *     License, or (at your option) any later version.
  19  *
  20  *     This file is distributed in the hope that it will be useful
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  * Or, alternatively
  26  *
  27  *  b) Permission is hereby granted, free of charge, to any person
  28  *     obtaining a copy of this software and associated documentation
  29  *     files (the "Software"), to deal in the Software without
  30  *     restriction, including without limitation the rights to use
  31  *     copy, modify, merge, publish, distribute, sublicense, and/or
  32  *     sell copies of the Software, and to permit persons to whom the
  33  *     Software is furnished to do so, subject to the following
  34  *     conditions:
  35  *
  36  *     The above copyright notice and this permission notice shall be
  37  *     included in all copies or substantial portions of the Software.
  38  *
  39  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  46  *     OTHER DEALINGS IN THE SOFTWARE.
  47  */
  48
  49 #include "skeleton.dtsi"
  50 #include <dt-bindings/interrupt-controller/arm-gic.h>
  51 #include <dt-bindings/interrupt-controller/irq.h>
  52
  53 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
  54
  55 / {
  56         model = "Marvell Armada 38x family SoC";
  57         compatible = "marvell,armada380";
  58
  59         aliases {
  60                 gpio0 = &gpio0;
  61                 gpio1 = &gpio1;
  62                 serial0 = &uart0;
  63                 serial1 = &uart1;
  64         };
  65
  66         soc {
  67                 compatible = "marvell,armada380-mbus", "simple-bus";
  68                 #address-cells = <2>;
  69                 #size-cells = <1>;
  70                 controller = <&mbusc>;
  71                 interrupt-parent = <&gic>;
  72                 pcie-mem-aperture = <0xe0000000 0x8000000>;
  73                 pcie-io-aperture  = <0xe8000000 0x100000>;
  74
  75                 bootrom {
  76                         compatible = "marvell,bootrom";
  77                         reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
  78                 };
  79
  80                 devbus-bootcs {
  81                         compatible = "marvell,mvebu-devbus";
  82                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
  83                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
  84                         #address-cells = <1>;
  85                         #size-cells = <1>;
  86                         clocks = <&coreclk 0>;
  87                         status = "disabled";
  88                 };
  89
  90                 devbus-cs0 {
  91                         compatible = "marvell,mvebu-devbus";
  92                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
  93                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
  94                         #address-cells = <1>;
  95                         #size-cells = <1>;
  96                         clocks = <&coreclk 0>;
  97                         status = "disabled";
  98                 };
  99
 100                 devbus-cs1 {
 101                         compatible = "marvell,mvebu-devbus";
 102                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
 103                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
 104                         #address-cells = <1>;
 105                         #size-cells = <1>;
 106                         clocks = <&coreclk 0>;
 107                         status = "disabled";
 108                 };
 109
 110                 devbus-cs2 {
 111                         compatible = "marvell,mvebu-devbus";
 112                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
 113                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
 114                         #address-cells = <1>;
 115                         #size-cells = <1>;
 116                         clocks = <&coreclk 0>;
 117                         status = "disabled";
 118                 };
 119
 120                 devbus-cs3 {
 121                         compatible = "marvell,mvebu-devbus";
 122                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
 123                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
 124                         #address-cells = <1>;
 125                         #size-cells = <1>;
 126                         clocks = <&coreclk 0>;
 127                         status = "disabled";
 128                 };
 129
 130                 internal-regs {
 131                         compatible = "simple-bus";
 132                         #address-cells = <1>;
 133                         #size-cells = <1>;
 134                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
 135
 136                         L2: cache-controller@8000 {
 137                                 compatible = "arm,pl310-cache";
 138                                 reg = <0x8000 0x1000>;
 139                                 cache-unified;
 140                                 cache-level = <2>;
 141                         };
 142
 143                         scu@c000 {
 144                                 compatible = "arm,cortex-a9-scu";
 145                                 reg = <0xc000 0x58>;
 146                         };
 147
 148                         timer@c600 {
 149                                 compatible = "arm,cortex-a9-twd-timer";
 150                                 reg = <0xc600 0x20>;
 151                                 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
 152                                 clocks = <&coreclk 2>;
 153                         };
 154
 155                         gic: interrupt-controller@d000 {
 156                                 compatible = "arm,cortex-a9-gic";
 157                                 #interrupt-cells = <3>;
 158                                 #size-cells = <0>;
 159                                 interrupt-controller;
 160                                 reg = <0xd000 0x1000>,
 161                                       <0xc100 0x100>;
 162                         };
 163
 164                         spi0: spi@10600 {
 165                                 compatible = "marvell,orion-spi";
 166                                 reg = <0x10600 0x50>;
 167                                 #address-cells = <1>;
 168                                 #size-cells = <0>;
 169                                 cell-index = <0>;
 170                                 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
 171                                 clocks = <&coreclk 0>;
 172                                 status = "disabled";
 173                         };
 174
 175                         spi1: spi@10680 {
 176                                 compatible = "marvell,orion-spi";
 177                                 reg = <0x10680 0x50>;
 178                                 #address-cells = <1>;
 179                                 #size-cells = <0>;
 180                                 cell-index = <1>;
 181                                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 182                                 clocks = <&coreclk 0>;
 183                                 status = "disabled";
 184                         };
 185
 186                         i2c0: i2c@11000 {
 187                                 compatible = "marvell,mv64xxx-i2c";
 188                                 reg = <0x11000 0x20>;
 189                                 #address-cells = <1>;
 190                                 #size-cells = <0>;
 191                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 192                                 timeout-ms = <1000>;
 193                                 clocks = <&coreclk 0>;
 194                                 status = "disabled";
 195                         };
 196
 197                         i2c1: i2c@11100 {
 198                                 compatible = "marvell,mv64xxx-i2c";
 199                                 reg = <0x11100 0x20>;
 200                                 #address-cells = <1>;
 201                                 #size-cells = <0>;
 202                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 203                                 timeout-ms = <1000>;
 204                                 clocks = <&coreclk 0>;
 205                                 status = "disabled";
 206                         };
 207
 208                         uart0: serial@12000 {
 209                                 compatible = "snps,dw-apb-uart";
 210                                 reg = <0x12000 0x100>;
 211                                 reg-shift = <2>;
 212                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 213                                 reg-io-width = <1>;
 214                                 clocks = <&coreclk 0>;
 215                                 status = "disabled";
 216                         };
 217
 218                         uart1: serial@12100 {
 219                                 compatible = "snps,dw-apb-uart";
 220                                 reg = <0x12100 0x100>;
 221                                 reg-shift = <2>;
 222                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 223                                 reg-io-width = <1>;
 224                                 clocks = <&coreclk 0>;
 225                                 status = "disabled";
 226                         };
 227
 228                         pinctrl: pinctrl@18000 {
 229                                 reg = <0x18000 0x20>;
 230
 231                                 ge0_rgmii_pins: ge-rgmii-pins-0 {
 232                                         marvell,pins = "mpp6", "mpp7", "mpp8",
 233                                                        "mpp9", "mpp10", "mpp11",
 234                                                        "mpp12", "mpp13", "mpp14",
 235                                                        "mpp15", "mpp16", "mpp17";
 236                                         marvell,function = "ge0";
 237                                 };
 238
 239                                 ge1_rgmii_pins: ge-rgmii-pins-1 {
 240                                         marvell,pins = "mpp21", "mpp27", "mpp28",
 241                                                        "mpp29", "mpp30", "mpp31",
 242                                                        "mpp32", "mpp37", "mpp38",
 243                                                        "mpp39", "mpp40", "mpp41";
 244                                         marvell,function = "ge1";
 245                                 };
 246
 247                                 i2c0_pins: i2c-pins-0 {
 248                                         marvell,pins = "mpp2", "mpp3";
 249                                         marvell,function = "i2c0";
 250                                 };
 251
 252                                 mdio_pins: mdio-pins {
 253                                         marvell,pins = "mpp4", "mpp5";
 254                                         marvell,function = "ge";
 255                                 };
 256
 257                                 ref_clk0_pins: ref-clk-pins-0 {
 258                                         marvell,pins = "mpp45";
 259                                         marvell,function = "ref";
 260                                 };
 261
 262                                 ref_clk1_pins: ref-clk-pins-1 {
 263                                         marvell,pins = "mpp46";
 264                                         marvell,function = "ref";
 265                                 };
 266
 267                                 spi0_pins: spi-pins-0 {
 268                                         marvell,pins = "mpp22", "mpp23", "mpp24",
 269                                                        "mpp25";
 270                                         marvell,function = "spi0";
 271                                 };
 272
 273                                 spi1_pins: spi-pins-1 {
 274                                         marvell,pins = "mpp56", "mpp57", "mpp58",
 275                                                        "mpp59";
 276                                         marvell,function = "spi1";
 277                                 };
 278
 279                                 uart0_pins: uart-pins-0 {
 280                                         marvell,pins = "mpp0", "mpp1";
 281                                         marvell,function = "ua0";
 282                                 };
 283
 284                                 uart1_pins: uart-pins-1 {
 285                                         marvell,pins = "mpp19", "mpp20";
 286                                         marvell,function = "ua1";
 287                                 };
 288
 289                                 sdhci_pins: sdhci-pins {
 290                                         marvell,pins = "mpp48", "mpp49", "mpp50",
 291                                                        "mpp52", "mpp53", "mpp54",
 292                                                        "mpp55", "mpp57", "mpp58",
 293                                                        "mpp59";
 294                                         marvell,function = "sd0";
 295                                 };
 296
 297                                 sata0_pins: sata-pins-0 {
 298                                         marvell,pins = "mpp20";
 299                                         marvell,function = "sata0";
 300                                 };
 301
 302                                 sata1_pins: sata-pins-1 {
 303                                         marvell,pins = "mpp19";
 304                                         marvell,function = "sata1";
 305                                 };
 306
 307                                 sata2_pins: sata-pins-2 {
 308                                         marvell,pins = "mpp47";
 309                                         marvell,function = "sata2";
 310                                 };
 311
 312                                 sata3_pins: sata-pins-3 {
 313                                         marvell,pins = "mpp44";
 314                                         marvell,function = "sata3";
 315                                 };
 316                         };
 317
 318                         gpio0: gpio@18100 {
 319                                 compatible = "marvell,orion-gpio";
 320                                 reg = <0x18100 0x40>;
 321                                 ngpios = <32>;
 322                                 gpio-controller;
 323                                 #gpio-cells = <2>;
 324                                 interrupt-controller;
 325                                 #interrupt-cells = <2>;
 326                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 327                                              <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 328                                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 329                                              <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 330                         };
 331
 332                         gpio1: gpio@18140 {
 333                                 compatible = "marvell,orion-gpio";
 334                                 reg = <0x18140 0x40>;
 335                                 ngpios = <28>;
 336                                 gpio-controller;
 337                                 #gpio-cells = <2>;
 338                                 interrupt-controller;
 339                                 #interrupt-cells = <2>;
 340                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 341                                              <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 342                                              <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 343                                              <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 344                         };
 345
 346                         system-controller@18200 {
 347                                 compatible = "marvell,armada-380-system-controller",
 348                                              "marvell,armada-370-xp-system-controller";
 349                                 reg = <0x18200 0x100>;
 350                         };
 351
 352                         gateclk: clock-gating-control@18220 {
 353                                 compatible = "marvell,armada-380-gating-clock";
 354                                 reg = <0x18220 0x4>;
 355                                 clocks = <&coreclk 0>;
 356                                 #clock-cells = <1>;
 357                         };
 358
 359                         coreclk: mvebu-sar@18600 {
 360                                 compatible = "marvell,armada-380-core-clock";
 361                                 reg = <0x18600 0x04>;
 362                                 #clock-cells = <1>;
 363                         };
 364
 365                         mbusc: mbus-controller@20000 {
 366                                 compatible = "marvell,mbus-controller";
 367                                 reg = <0x20000 0x100>, <0x20180 0x20>;
 368                         };
 369
 370                         mpic: interrupt-controller@20a00 {
 371                                 compatible = "marvell,mpic";
 372                                 reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 373                                 #interrupt-cells = <1>;
 374                                 #size-cells = <1>;
 375                                 interrupt-controller;
 376                                 msi-controller;
 377                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
 378                         };
 379
 380                         timer@20300 {
 381                                 compatible = "marvell,armada-380-timer",
 382                                              "marvell,armada-xp-timer";
 383                                 reg = <0x20300 0x30>, <0x21040 0x30>;
 384                                 interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
 385                                                       <&gic  GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
 386                                                       <&gic  GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
 387                                                       <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 388                                                       <&mpic 5>,
 389                                                       <&mpic 6>;
 390                                 clocks = <&coreclk 2>, <&refclk>;
 391                                 clock-names = "nbclk", "fixed";
 392                         };
 393
 394                         watchdog@20300 {
 395                                 compatible = "marvell,armada-380-wdt";
 396                                 reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
 397                                 clocks = <&coreclk 2>, <&refclk>;
 398                                 clock-names = "nbclk", "fixed";
 399                         };
 400
 401                         cpurst@20800 {
 402                                 compatible = "marvell,armada-370-cpu-reset";
 403                                 reg = <0x20800 0x10>;
 404                         };
 405
 406                         mpcore-soc-ctrl@20d20 {
 407                                 compatible = "marvell,armada-380-mpcore-soc-ctrl";
 408                                 reg = <0x20d20 0x6c>;
 409                         };
 410
 411                         coherency-fabric@21010 {
 412                                 compatible = "marvell,armada-380-coherency-fabric";
 413                                 reg = <0x21010 0x1c>;
 414                         };
 415
 416                         pmsu@22000 {
 417                                 compatible = "marvell,armada-380-pmsu";
 418                                 reg = <0x22000 0x1000>;
 419                         };
 420
 421                         eth1: ethernet@30000 {
 422                                 compatible = "marvell,armada-370-neta";
 423                                 reg = <0x30000 0x4000>;
 424                                 interrupts-extended = <&mpic 10>;
 425                                 clocks = <&gateclk 3>;
 426                                 status = "disabled";
 427                         };
 428
 429                         eth2: ethernet@34000 {
 430                                 compatible = "marvell,armada-370-neta";
 431                                 reg = <0x34000 0x4000>;
 432                                 interrupts-extended = <&mpic 12>;
 433                                 clocks = <&gateclk 2>;
 434                                 status = "disabled";
 435                         };
 436
 437                         usb@58000 {
 438                                 compatible = "marvell,orion-ehci";
 439                                 reg = <0x58000 0x500>;
 440                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 441                                 clocks = <&gateclk 18>;
 442                                 status = "disabled";
 443                         };
 444
 445                         xor@60800 {
 446                                 compatible = "marvell,orion-xor";
 447                                 reg = <0x60800 0x100
 448                                        0x60a00 0x100>;
 449                                 clocks = <&gateclk 22>;
 450                                 status = "okay";
 451
 452                                 xor00 {
 453                                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 454                                         dmacap,memcpy;
 455                                         dmacap,xor;
 456                                 };
 457                                 xor01 {
 458                                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 459                                         dmacap,memcpy;
 460                                         dmacap,xor;
 461                                         dmacap,memset;
 462                                 };
 463                         };
 464
 465                         xor@60900 {
 466                                 compatible = "marvell,orion-xor";
 467                                 reg = <0x60900 0x100
 468                                        0x60b00 0x100>;
 469                                 clocks = <&gateclk 28>;
 470                                 status = "okay";
 471
 472                                 xor10 {
 473                                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 474                                         dmacap,memcpy;
 475                                         dmacap,xor;
 476                                 };
 477                                 xor11 {
 478                                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 479                                         dmacap,memcpy;
 480                                         dmacap,xor;
 481                                         dmacap,memset;
 482                                 };
 483                         };
 484
 485                         eth0: ethernet@70000 {
 486                                 compatible = "marvell,armada-370-neta";
 487                                 reg = <0x70000 0x4000>;
 488                                 interrupts-extended = <&mpic 8>;
 489                                 clocks = <&gateclk 4>;
 490                                 status = "disabled";
 491                         };
 492
 493                         mdio@72004 {
 494                                 #address-cells = <1>;
 495                                 #size-cells = <0>;
 496                                 compatible = "marvell,orion-mdio";
 497                                 reg = <0x72004 0x4>;
 498                                 clocks = <&gateclk 4>;
 499                         };
 500
 501                         rtc@a3800 {
 502                                 compatible = "marvell,armada-380-rtc";
 503                                 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
 504                                 reg-names = "rtc", "rtc-soc";
 505                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 506                         };
 507
 508                         sata@a8000 {
 509                                 compatible = "marvell,armada-380-ahci";
 510                                 reg = <0xa8000 0x2000>;
 511                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 512                                 clocks = <&gateclk 15>;
 513                                 status = "disabled";
 514                         };
 515
 516                         sata@e0000 {
 517                                 compatible = "marvell,armada-380-ahci";
 518                                 reg = <0xe0000 0x2000>;
 519                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 520                                 clocks = <&gateclk 30>;
 521                                 status = "disabled";
 522                         };
 523
 524                         coredivclk: clock@e4250 {
 525                                 compatible = "marvell,armada-380-corediv-clock";
 526                                 reg = <0xe4250 0xc>;
 527                                 #clock-cells = <1>;
 528                                 clocks = <&mainpll>;
 529                                 clock-output-names = "nand";
 530                         };
 531
 532                         thermal@e8078 {
 533                                 compatible = "marvell,armada380-thermal";
 534                                 reg = <0xe4078 0x4>, <0xe4074 0x4>;
 535                                 status = "okay";
 536                         };
 537
 538                         flash@d0000 {
 539                                 compatible = "marvell,armada370-nand";
 540                                 reg = <0xd0000 0x54>;
 541                                 #address-cells = <1>;
 542                                 #size-cells = <1>;
 543                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 544                                 clocks = <&coredivclk 0>;
 545                                 status = "disabled";
 546                         };
 547
 548                         sdhci@d8000 {
 549                                 compatible = "marvell,armada-380-sdhci";
 550                                 reg-names = "sdhci", "mbus", "conf-sdio3";
 551                                 reg = <0xd8000 0x1000>,
 552                                         <0xdc000 0x100>,
 553                                         <0x18454 0x4>;
 554                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 555                                 clocks = <&gateclk 17>;
 556                                 mrvl,clk-delay-cycles = <0x1F>;
 557                                 status = "disabled";
 558                         };
 559
 560                         usb3@f0000 {
 561                                 compatible = "marvell,armada-380-xhci";
 562                                 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
 563                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 564                                 clocks = <&gateclk 9>;
 565                                 status = "disabled";
 566                         };
 567
 568                         usb3@f8000 {
 569                                 compatible = "marvell,armada-380-xhci";
 570                                 reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
 571                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 572                                 clocks = <&gateclk 10>;
 573                                 status = "disabled";
 574                         };
 575                 };
 576         };
 577
 578         clocks {
 579                 /* 2 GHz fixed main PLL */
 580                 mainpll: mainpll {
 581                         compatible = "fixed-clock";
 582                         #clock-cells = <0>;
 583                         clock-frequency = <2000000000>;
 584                 };
 585
 586                 /* 25 MHz reference crystal */
 587                 refclk: oscillator {
 588                         compatible = "fixed-clock";
 589                         #clock-cells = <0>;
 590                         clock-frequency = <25000000>;
 591                 };
 592         };
 593 };