2 * Device Tree file for Marvell Armada 385 development board
5 * Copyright (C) 2014 Marvell
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
14 * a) This file is licensed under the terms of the GNU General Public
15 * License version 2. This program is licensed "as is" without
16 * any warranty of any kind, whether express or implied.
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
43 #include "armada-388.dtsi"
44 #include <dt-bindings/gpio/gpio.h>
47 model = "Marvell Armada 385 GP";
48 compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
51 stdout-path = "serial0:115200n8";
55 device_type = "memory";
56 reg = <0x00000000 0x80000000>; /* 2 GB */
60 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
61 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
62 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
63 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&spi0_pins>;
74 compatible = "st,m25p128", "jedec,spi-nor";
75 reg = <0>; /* Chip select 0 */
76 spi-max-frequency = <50000000>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&i2c0_pins>;
85 clock-frequency = <100000>;
87 expander0: pca9555@20 {
88 compatible = "nxp,pca9555";
89 pinctrl-names = "default";
90 pinctrl-0 = <&pca0_pins>;
91 interrupt-parent = <&gpio0>;
92 interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
96 #interrupt-cells = <2>;
100 expander1: pca9555@21 {
101 compatible = "nxp,pca9555";
102 pinctrl-names = "default";
103 interrupt-parent = <&gpio0>;
104 interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
107 interrupt-controller;
108 #interrupt-cells = <2>;
113 compatible = "atmel,24c64";
120 * Exported on the micro USB connector CON16
124 pinctrl-names = "default";
125 pinctrl-0 = <&uart0_pins>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&ge1_rgmii_pins>;
135 phy-mode = "rgmii-id";
140 vcc-supply = <®_usb2_0_vbus>;
146 pinctrl-names = "default";
148 * The Reference Clock 0 is used to provide a
151 pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
154 phy-mode = "rgmii-id";
159 pinctrl-names = "default";
160 pinctrl-0 = <&mdio_pins>;
162 phy0: ethernet-phy@1 {
166 phy1: ethernet-phy@0 {
172 pinctrl-names = "default";
173 pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
175 #address-cells = <1>;
180 target-supply = <®_5v_sata0>;
185 target-supply = <®_5v_sata1>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
193 #address-cells = <1>;
198 target-supply = <®_5v_sata2>;
203 target-supply = <®_5v_sata3>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&sdhci_pins>;
210 cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
219 vcc-supply = <®_usb2_1_vbus>;
225 vcc-supply = <®_usb3_vbus>;
233 * One PCIe units is accessible through
234 * standard PCIe slot on the board.
242 * The two other PCIe units are accessible
243 * through mini PCIe slot on the board.
256 compatible = "gpio-fan";
257 gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
258 gpio-fan,speed-map = < 0 0
263 reg_usb3_vbus: usb3-vbus {
264 compatible = "regulator-fixed";
265 regulator-name = "usb3-vbus";
266 regulator-min-microvolt = <5000000>;
267 regulator-max-microvolt = <5000000>;
270 gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
273 reg_usb2_0_vbus: v5-vbus0 {
274 compatible = "regulator-fixed";
275 regulator-name = "v5.0-vbus0";
276 regulator-min-microvolt = <5000000>;
277 regulator-max-microvolt = <5000000>;
280 gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
283 reg_usb2_1_vbus: v5-vbus1 {
284 compatible = "regulator-fixed";
285 regulator-name = "v5.0-vbus1";
286 regulator-min-microvolt = <5000000>;
287 regulator-max-microvolt = <5000000>;
290 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
293 reg_usb2_1_vbus: v5-vbus1 {
294 compatible = "regulator-fixed";
295 regulator-name = "v5.0-vbus1";
296 regulator-min-microvolt = <5000000>;
297 regulator-max-microvolt = <5000000>;
300 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
303 reg_sata0: pwr-sata0 {
304 compatible = "regulator-fixed";
305 regulator-name = "pwr_en_sata0";
306 regulator-min-microvolt = <12000000>;
307 regulator-max-microvolt = <12000000>;
310 gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
313 reg_5v_sata0: v5-sata0 {
314 compatible = "regulator-fixed";
315 regulator-name = "v5.0-sata0";
316 regulator-min-microvolt = <5000000>;
317 regulator-max-microvolt = <5000000>;
319 vin-supply = <®_sata0>;
322 reg_12v_sata0: v12-sata0 {
323 compatible = "regulator-fixed";
324 regulator-name = "v12.0-sata0";
325 regulator-min-microvolt = <12000000>;
326 regulator-max-microvolt = <12000000>;
328 vin-supply = <®_sata0>;
331 reg_sata1: pwr-sata1 {
332 regulator-name = "pwr_en_sata1";
333 compatible = "regulator-fixed";
334 regulator-min-microvolt = <12000000>;
335 regulator-max-microvolt = <12000000>;
338 gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
341 reg_5v_sata1: v5-sata1 {
342 compatible = "regulator-fixed";
343 regulator-name = "v5.0-sata1";
344 regulator-min-microvolt = <5000000>;
345 regulator-max-microvolt = <5000000>;
347 vin-supply = <®_sata1>;
350 reg_12v_sata1: v12-sata1 {
351 compatible = "regulator-fixed";
352 regulator-name = "v12.0-sata1";
353 regulator-min-microvolt = <12000000>;
354 regulator-max-microvolt = <12000000>;
356 vin-supply = <®_sata1>;
359 reg_sata2: pwr-sata2 {
360 compatible = "regulator-fixed";
361 regulator-name = "pwr_en_sata2";
364 gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
367 reg_5v_sata2: v5-sata2 {
368 compatible = "regulator-fixed";
369 regulator-name = "v5.0-sata2";
370 regulator-min-microvolt = <5000000>;
371 regulator-max-microvolt = <5000000>;
373 vin-supply = <®_sata2>;
376 reg_12v_sata2: v12-sata2 {
377 compatible = "regulator-fixed";
378 regulator-name = "v12.0-sata2";
379 regulator-min-microvolt = <12000000>;
380 regulator-max-microvolt = <12000000>;
382 vin-supply = <®_sata2>;
385 reg_sata3: pwr-sata3 {
386 compatible = "regulator-fixed";
387 regulator-name = "pwr_en_sata3";
390 gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
393 reg_5v_sata3: v5-sata3 {
394 compatible = "regulator-fixed";
395 regulator-name = "v5.0-sata3";
396 regulator-min-microvolt = <5000000>;
397 regulator-max-microvolt = <5000000>;
399 vin-supply = <®_sata3>;
402 reg_12v_sata3: v12-sata3 {
403 compatible = "regulator-fixed";
404 regulator-name = "v12.0-sata3";
405 regulator-min-microvolt = <12000000>;
406 regulator-max-microvolt = <12000000>;
408 vin-supply = <®_sata3>;
413 pca0_pins: pca0_pins {
414 marvell,pins = "mpp18";
415 marvell,function = "gpio";