arch/arm/boot/dts/armada-370-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is dual-licensed: you can use it either under the terms
  12  * of the GPL or the X11 license, at your option. Note that this dual
  13  * licensing only applies to this file, and not this project as a
  14  * whole.
  15  *
  16  *  a) This file is free software; you can redistribute it and/or
  17  *     modify it under the terms of the GNU General Public License as
  18  *     published by the Free Software Foundation; either version 2 of the
  19  *     License, or (at your option) any later version.
  20  *
  21  *     This file is distributed in the hope that it will be useful
  22  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  *     GNU General Public License for more details.
  25  *
  26  * Or, alternatively
  27  *
  28  *  b) Permission is hereby granted, free of charge, to any person
  29  *     obtaining a copy of this software and associated documentation
  30  *     files (the "Software"), to deal in the Software without
  31  *     restriction, including without limitation the rights to use
  32  *     copy, modify, merge, publish, distribute, sublicense, and/or
  33  *     sell copies of the Software, and to permit persons to whom the
  34  *     Software is furnished to do so, subject to the following
  35  *     conditions:
  36  *
  37  *     The above copyright notice and this permission notice shall be
  38  *     included in all copies or substantial portions of the Software.
  39  *
  40  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  41  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  42  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  43  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  44  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  45  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  46  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  47  *     OTHER DEALINGS IN THE SOFTWARE.
  48  *
  49  * This file contains the definitions that are common to the Armada
  50  * 370 and Armada XP SoC.
  51  */
  52
  53 /include/ "skeleton64.dtsi"
  54
  55 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
  56
  57 / {
  58         model = "Marvell Armada 370 and XP SoC";
  59         compatible = "marvell,armada-370-xp";
  60
  61         aliases {
  62         };
  63
  64         cpus {
  65                 #address-cells = <1>;
  66                 #size-cells = <0>;
  67                 cpu@0 {
  68                         compatible = "marvell,sheeva-v7";
  69                         device_type = "cpu";
  70                         reg = <0>;
  71                 };
  72         };
  73
  74         soc {
  75                 #address-cells = <2>;
  76                 #size-cells = <1>;
  77                 controller = <&mbusc>;
  78                 interrupt-parent = <&mpic>;
  79                 pcie-mem-aperture = <0xf8000000 0x7e00000>;
  80                 pcie-io-aperture  = <0xffe00000 0x100000>;
  81
  82                 devbus-bootcs {
  83                         compatible = "marvell,mvebu-devbus";
  84                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
  85                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
  86                         #address-cells = <1>;
  87                         #size-cells = <1>;
  88                         clocks = <&coreclk 0>;
  89                         status = "disabled";
  90                 };
  91
  92                 devbus-cs0 {
  93                         compatible = "marvell,mvebu-devbus";
  94                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
  95                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
  96                         #address-cells = <1>;
  97                         #size-cells = <1>;
  98                         clocks = <&coreclk 0>;
  99                         status = "disabled";
 100                 };
 101
 102                 devbus-cs1 {
 103                         compatible = "marvell,mvebu-devbus";
 104                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
 105                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
 106                         #address-cells = <1>;
 107                         #size-cells = <1>;
 108                         clocks = <&coreclk 0>;
 109                         status = "disabled";
 110                 };
 111
 112                 devbus-cs2 {
 113                         compatible = "marvell,mvebu-devbus";
 114                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
 115                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118                         clocks = <&coreclk 0>;
 119                         status = "disabled";
 120                 };
 121
 122                 devbus-cs3 {
 123                         compatible = "marvell,mvebu-devbus";
 124                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
 125                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
 126                         #address-cells = <1>;
 127                         #size-cells = <1>;
 128                         clocks = <&coreclk 0>;
 129                         status = "disabled";
 130                 };
 131
 132                 internal-regs {
 133                         compatible = "simple-bus";
 134                         #address-cells = <1>;
 135                         #size-cells = <1>;
 136                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
 137
 138                         rtc@10300 {
 139                                 compatible = "marvell,orion-rtc";
 140                                 reg = <0x10300 0x20>;
 141                                 interrupts = <50>;
 142                         };
 143
 144                         spi0: spi@10600 {
 145                                 compatible = "marvell,armada-370-spi", "marvell,orion-spi";
 146                                 reg = <0x10600 0x28>;
 147                                 #address-cells = <1>;
 148                                 #size-cells = <0>;
 149                                 cell-index = <0>;
 150                                 interrupts = <30>;
 151                                 clocks = <&coreclk 0>;
 152                                 status = "disabled";
 153                         };
 154
 155                         spi1: spi@10680 {
 156                                 compatible = "marvell,armada-370-spi", "marvell,orion-spi";
 157                                 reg = <0x10680 0x28>;
 158                                 #address-cells = <1>;
 159                                 #size-cells = <0>;
 160                                 cell-index = <1>;
 161                                 interrupts = <92>;
 162                                 clocks = <&coreclk 0>;
 163                                 status = "disabled";
 164                         };
 165
 166                         i2c0: i2c@11000 {
 167                                 compatible = "marvell,mv64xxx-i2c";
 168                                 #address-cells = <1>;
 169                                 #size-cells = <0>;
 170                                 interrupts = <31>;
 171                                 timeout-ms = <1000>;
 172                                 clocks = <&coreclk 0>;
 173                                 status = "disabled";
 174                         };
 175
 176                         i2c1: i2c@11100 {
 177                                 compatible = "marvell,mv64xxx-i2c";
 178                                 #address-cells = <1>;
 179                                 #size-cells = <0>;
 180                                 interrupts = <32>;
 181                                 timeout-ms = <1000>;
 182                                 clocks = <&coreclk 0>;
 183                                 status = "disabled";
 184                         };
 185
 186                         uart0: serial@12000 {
 187                                 compatible = "snps,dw-apb-uart";
 188                                 reg = <0x12000 0x100>;
 189                                 reg-shift = <2>;
 190                                 interrupts = <41>;
 191                                 reg-io-width = <1>;
 192                                 clocks = <&coreclk 0>;
 193                                 status = "disabled";
 194                         };
 195
 196                         uart1: serial@12100 {
 197                                 compatible = "snps,dw-apb-uart";
 198                                 reg = <0x12100 0x100>;
 199                                 reg-shift = <2>;
 200                                 interrupts = <42>;
 201                                 reg-io-width = <1>;
 202                                 clocks = <&coreclk 0>;
 203                                 status = "disabled";
 204                         };
 205
 206                         pinctrl: pin-ctrl@18000 {
 207                                 reg = <0x18000 0x38>;
 208                         };
 209
 210                         coredivclk: corediv-clock@18740 {
 211                                 compatible = "marvell,armada-370-corediv-clock";
 212                                 reg = <0x18740 0xc>;
 213                                 #clock-cells = <1>;
 214                                 clocks = <&mainpll>;
 215                                 clock-output-names = "nand";
 216                         };
 217
 218                         mbusc: mbus-controller@20000 {
 219                                 compatible = "marvell,mbus-controller";
 220                                 reg = <0x20000 0x100>, <0x20180 0x20>,
 221                                       <0x20250 0x8>;
 222                         };
 223
 224                         mpic: interrupt-controller@20000 {
 225                                 compatible = "marvell,mpic";
 226                                 #interrupt-cells = <1>;
 227                                 #size-cells = <1>;
 228                                 interrupt-controller;
 229                                 msi-controller;
 230                         };
 231
 232                         coherency-fabric@20200 {
 233                                 compatible = "marvell,coherency-fabric";
 234                                 reg = <0x20200 0xb0>, <0x21010 0x1c>;
 235                         };
 236
 237                         timer@20300 {
 238                                 reg = <0x20300 0x30>, <0x21040 0x30>;
 239                                 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
 240                         };
 241
 242                         watchdog@20300 {
 243                                 reg = <0x20300 0x34>, <0x20704 0x4>;
 244                         };
 245
 246                         pmsu@22000 {
 247                                 compatible = "marvell,armada-370-pmsu";
 248                                 reg = <0x22000 0x1000>;
 249                         };
 250
 251                         usb@50000 {
 252                                 compatible = "marvell,orion-ehci";
 253                                 reg = <0x50000 0x500>;
 254                                 interrupts = <45>;
 255                                 status = "disabled";
 256                         };
 257
 258                         usb@51000 {
 259                                 compatible = "marvell,orion-ehci";
 260                                 reg = <0x51000 0x500>;
 261                                 interrupts = <46>;
 262                                 status = "disabled";
 263                         };
 264
 265                         eth0: ethernet@70000 {
 266                                 compatible = "marvell,armada-370-neta";
 267                                 reg = <0x70000 0x4000>;
 268                                 interrupts = <8>;
 269                                 clocks = <&gateclk 4>;
 270                                 status = "disabled";
 271                         };
 272
 273                         mdio: mdio {
 274                                 #address-cells = <1>;
 275                                 #size-cells = <0>;
 276                                 compatible = "marvell,orion-mdio";
 277                                 reg = <0x72004 0x4>;
 278                                 clocks = <&gateclk 4>;
 279                         };
 280
 281                         eth1: ethernet@74000 {
 282                                 compatible = "marvell,armada-370-neta";
 283                                 reg = <0x74000 0x4000>;
 284                                 interrupts = <10>;
 285                                 clocks = <&gateclk 3>;
 286                                 status = "disabled";
 287                         };
 288
 289                         sata@a0000 {
 290                                 compatible = "marvell,armada-370-sata";
 291                                 reg = <0xa0000 0x5000>;
 292                                 interrupts = <55>;
 293                                 clocks = <&gateclk 15>, <&gateclk 30>;
 294                                 clock-names = "0", "1";
 295                                 status = "disabled";
 296                         };
 297
 298                         nand@d0000 {
 299                                 compatible = "marvell,armada370-nand";
 300                                 reg = <0xd0000 0x54>;
 301                                 #address-cells = <1>;
 302                                 #size-cells = <1>;
 303                                 interrupts = <113>;
 304                                 clocks = <&coredivclk 0>;
 305                                 status = "disabled";
 306                         };
 307
 308                         mvsdio@d4000 {
 309                                 compatible = "marvell,orion-sdio";
 310                                 reg = <0xd4000 0x200>;
 311                                 interrupts = <54>;
 312                                 clocks = <&gateclk 17>;
 313                                 bus-width = <4>;
 314                                 cap-sdio-irq;
 315                                 cap-sd-highspeed;
 316                                 cap-mmc-highspeed;
 317                                 status = "disabled";
 318                         };
 319                 };
 320         };
 321
 322         clocks {
 323                 /* 2 GHz fixed main PLL */
 324                 mainpll: mainpll {
 325                         compatible = "fixed-clock";
 326                         #clock-cells = <0>;
 327                         clock-frequency = <2000000000>;
 328                 };
 329         };
 330  };