2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&wakeupgen>;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
34 compatible = "arm,cortex-a9";
38 clocks = <&dpll_mpu_ck>;
41 clock-latency = <300000>; /* From omap-cpufreq driver */
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
51 interrupt-parent = <&gic>;
54 wakeupgen: interrupt-controller@48281000 {
55 compatible = "ti,omap4-wugen-mpu";
57 #interrupt-cells = <3>;
58 reg = <0x48281000 0x1000>;
59 interrupt-parent = <&gic>;
62 l2-cache-controller@48242000 {
63 compatible = "arm,pl310-cache";
64 reg = <0x48242000 0x1000>;
69 am43xx_control_module: control_module@4a002000 {
70 compatible = "syscon";
71 reg = <0x44e10000 0x7f4>;
74 am43xx_pinmux: pinmux@44e10800 {
75 compatible = "ti,am437-padconf", "pinctrl-single";
76 reg = <0x44e10800 0x31c>;
79 #interrupt-cells = <1>;
81 pinctrl-single,register-width = <32>;
82 pinctrl-single,function-mask = <0xffffffff>;
86 compatible = "ti,am4372-l3-noc", "simple-bus";
90 ti,hwmods = "l3_main";
91 reg = <0x44000000 0x400000
93 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
94 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
97 compatible = "ti,am4-prcm";
98 reg = <0x44df0000 0x11000>;
100 prcm_clocks: clocks {
101 #address-cells = <1>;
105 prcm_clockdomains: clockdomains {
109 scrm: scrm@44e10000 {
110 compatible = "ti,am4-scrm";
111 reg = <0x44e10000 0x2000>;
113 scrm_clocks: clocks {
114 #address-cells = <1>;
118 scrm_clockdomains: clockdomains {
122 edma: edma@49000000 {
123 compatible = "ti,edma3";
124 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
125 reg = <0x49000000 0x10000>,
127 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
128 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
129 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
133 uart0: serial@44e09000 {
134 compatible = "ti,am4372-uart","ti,omap2-uart";
135 reg = <0x44e09000 0x2000>;
136 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
140 uart1: serial@48022000 {
141 compatible = "ti,am4372-uart","ti,omap2-uart";
142 reg = <0x48022000 0x2000>;
143 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
148 uart2: serial@48024000 {
149 compatible = "ti,am4372-uart","ti,omap2-uart";
150 reg = <0x48024000 0x2000>;
151 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
156 uart3: serial@481a6000 {
157 compatible = "ti,am4372-uart","ti,omap2-uart";
158 reg = <0x481a6000 0x2000>;
159 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
164 uart4: serial@481a8000 {
165 compatible = "ti,am4372-uart","ti,omap2-uart";
166 reg = <0x481a8000 0x2000>;
167 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
172 uart5: serial@481aa000 {
173 compatible = "ti,am4372-uart","ti,omap2-uart";
174 reg = <0x481aa000 0x2000>;
175 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
180 mailbox: mailbox@480C8000 {
181 compatible = "ti,omap4-mailbox";
182 reg = <0x480C8000 0x200>;
183 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
184 ti,hwmods = "mailbox";
186 ti,mbox-num-users = <4>;
187 ti,mbox-num-fifos = <8>;
188 mbox_wkupm3: wkup_m3 {
189 ti,mbox-tx = <0 0 0>;
190 ti,mbox-rx = <0 0 3>;
194 timer1: timer@44e31000 {
195 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
196 reg = <0x44e31000 0x400>;
197 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
199 ti,hwmods = "timer1";
202 timer2: timer@48040000 {
203 compatible = "ti,am4372-timer","ti,am335x-timer";
204 reg = <0x48040000 0x400>;
205 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
206 ti,hwmods = "timer2";
209 timer3: timer@48042000 {
210 compatible = "ti,am4372-timer","ti,am335x-timer";
211 reg = <0x48042000 0x400>;
212 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
213 ti,hwmods = "timer3";
217 timer4: timer@48044000 {
218 compatible = "ti,am4372-timer","ti,am335x-timer";
219 reg = <0x48044000 0x400>;
220 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
222 ti,hwmods = "timer4";
226 timer5: timer@48046000 {
227 compatible = "ti,am4372-timer","ti,am335x-timer";
228 reg = <0x48046000 0x400>;
229 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
231 ti,hwmods = "timer5";
235 timer6: timer@48048000 {
236 compatible = "ti,am4372-timer","ti,am335x-timer";
237 reg = <0x48048000 0x400>;
238 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
240 ti,hwmods = "timer6";
244 timer7: timer@4804a000 {
245 compatible = "ti,am4372-timer","ti,am335x-timer";
246 reg = <0x4804a000 0x400>;
247 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
249 ti,hwmods = "timer7";
253 timer8: timer@481c1000 {
254 compatible = "ti,am4372-timer","ti,am335x-timer";
255 reg = <0x481c1000 0x400>;
256 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
257 ti,hwmods = "timer8";
261 timer9: timer@4833d000 {
262 compatible = "ti,am4372-timer","ti,am335x-timer";
263 reg = <0x4833d000 0x400>;
264 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
265 ti,hwmods = "timer9";
269 timer10: timer@4833f000 {
270 compatible = "ti,am4372-timer","ti,am335x-timer";
271 reg = <0x4833f000 0x400>;
272 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
273 ti,hwmods = "timer10";
277 timer11: timer@48341000 {
278 compatible = "ti,am4372-timer","ti,am335x-timer";
279 reg = <0x48341000 0x400>;
280 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
281 ti,hwmods = "timer11";
285 counter32k: counter@44e86000 {
286 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
287 reg = <0x44e86000 0x40>;
288 ti,hwmods = "counter_32k";
292 compatible = "ti,am4372-rtc","ti,da830-rtc";
293 reg = <0x44e3e000 0x1000>;
294 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
295 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
301 compatible = "ti,am4372-wdt","ti,omap3-wdt";
302 reg = <0x44e35000 0x1000>;
303 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
304 ti,hwmods = "wd_timer2";
307 gpio0: gpio@44e07000 {
308 compatible = "ti,am4372-gpio","ti,omap4-gpio";
309 reg = <0x44e07000 0x1000>;
310 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
313 interrupt-controller;
314 #interrupt-cells = <2>;
319 gpio1: gpio@4804c000 {
320 compatible = "ti,am4372-gpio","ti,omap4-gpio";
321 reg = <0x4804c000 0x1000>;
322 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
325 interrupt-controller;
326 #interrupt-cells = <2>;
331 gpio2: gpio@481ac000 {
332 compatible = "ti,am4372-gpio","ti,omap4-gpio";
333 reg = <0x481ac000 0x1000>;
334 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
337 interrupt-controller;
338 #interrupt-cells = <2>;
343 gpio3: gpio@481ae000 {
344 compatible = "ti,am4372-gpio","ti,omap4-gpio";
345 reg = <0x481ae000 0x1000>;
346 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
349 interrupt-controller;
350 #interrupt-cells = <2>;
355 gpio4: gpio@48320000 {
356 compatible = "ti,am4372-gpio","ti,omap4-gpio";
357 reg = <0x48320000 0x1000>;
358 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
361 interrupt-controller;
362 #interrupt-cells = <2>;
367 gpio5: gpio@48322000 {
368 compatible = "ti,am4372-gpio","ti,omap4-gpio";
369 reg = <0x48322000 0x1000>;
370 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
373 interrupt-controller;
374 #interrupt-cells = <2>;
379 hwspinlock: spinlock@480ca000 {
380 compatible = "ti,omap4-hwspinlock";
381 reg = <0x480ca000 0x1000>;
382 ti,hwmods = "spinlock";
387 compatible = "ti,am4372-i2c","ti,omap4-i2c";
388 reg = <0x44e0b000 0x1000>;
389 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
391 #address-cells = <1>;
397 compatible = "ti,am4372-i2c","ti,omap4-i2c";
398 reg = <0x4802a000 0x1000>;
399 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
401 #address-cells = <1>;
407 compatible = "ti,am4372-i2c","ti,omap4-i2c";
408 reg = <0x4819c000 0x1000>;
409 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
411 #address-cells = <1>;
417 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
418 reg = <0x48030000 0x400>;
419 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
421 #address-cells = <1>;
427 compatible = "ti,omap4-hsmmc";
428 reg = <0x48060000 0x1000>;
431 ti,needs-special-reset;
434 dma-names = "tx", "rx";
435 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
440 compatible = "ti,omap4-hsmmc";
441 reg = <0x481d8000 0x1000>;
443 ti,needs-special-reset;
446 dma-names = "tx", "rx";
447 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
452 compatible = "ti,omap4-hsmmc";
453 reg = <0x47810000 0x1000>;
455 ti,needs-special-reset;
456 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
461 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
462 reg = <0x481a0000 0x400>;
463 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
465 #address-cells = <1>;
471 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
472 reg = <0x481a2000 0x400>;
473 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
475 #address-cells = <1>;
481 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
482 reg = <0x481a4000 0x400>;
483 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
485 #address-cells = <1>;
491 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
492 reg = <0x48345000 0x400>;
493 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
495 #address-cells = <1>;
500 mac: ethernet@4a100000 {
501 compatible = "ti,am4372-cpsw","ti,cpsw";
502 reg = <0x4a100000 0x800
504 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
505 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
506 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
507 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
508 #address-cells = <1>;
510 ti,hwmods = "cpgmac0";
511 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
512 clock-names = "fck", "cpts";
514 cpdma_channels = <8>;
515 ale_entries = <1024>;
516 bd_ram_size = <0x2000>;
519 mac_control = <0x20>;
522 cpts_clock_mult = <0x80000000>;
523 cpts_clock_shift = <29>;
526 davinci_mdio: mdio@4a101000 {
527 compatible = "ti,am4372-mdio","ti,davinci_mdio";
528 reg = <0x4a101000 0x100>;
529 #address-cells = <1>;
531 ti,hwmods = "davinci_mdio";
532 bus_freq = <1000000>;
536 cpsw_emac0: slave@4a100200 {
537 /* Filled in by U-Boot */
538 mac-address = [ 00 00 00 00 00 00 ];
541 cpsw_emac1: slave@4a100300 {
542 /* Filled in by U-Boot */
543 mac-address = [ 00 00 00 00 00 00 ];
546 phy_sel: cpsw-phy-sel@44e10650 {
547 compatible = "ti,am43xx-cpsw-phy-sel";
548 reg= <0x44e10650 0x4>;
549 reg-names = "gmii-sel";
553 epwmss0: epwmss@48300000 {
554 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
555 reg = <0x48300000 0x10>;
556 #address-cells = <1>;
559 ti,hwmods = "epwmss0";
562 ecap0: ecap@48300100 {
563 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
565 reg = <0x48300100 0x80>;
570 ehrpwm0: ehrpwm@48300200 {
571 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
573 reg = <0x48300200 0x80>;
574 ti,hwmods = "ehrpwm0";
579 epwmss1: epwmss@48302000 {
580 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
581 reg = <0x48302000 0x10>;
582 #address-cells = <1>;
585 ti,hwmods = "epwmss1";
588 ecap1: ecap@48302100 {
589 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
591 reg = <0x48302100 0x80>;
596 ehrpwm1: ehrpwm@48302200 {
597 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
599 reg = <0x48302200 0x80>;
600 ti,hwmods = "ehrpwm1";
605 epwmss2: epwmss@48304000 {
606 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
607 reg = <0x48304000 0x10>;
608 #address-cells = <1>;
611 ti,hwmods = "epwmss2";
614 ecap2: ecap@48304100 {
615 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
617 reg = <0x48304100 0x80>;
622 ehrpwm2: ehrpwm@48304200 {
623 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
625 reg = <0x48304200 0x80>;
626 ti,hwmods = "ehrpwm2";
631 epwmss3: epwmss@48306000 {
632 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
633 reg = <0x48306000 0x10>;
634 #address-cells = <1>;
637 ti,hwmods = "epwmss3";
640 ehrpwm3: ehrpwm@48306200 {
641 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
643 reg = <0x48306200 0x80>;
644 ti,hwmods = "ehrpwm3";
649 epwmss4: epwmss@48308000 {
650 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
651 reg = <0x48308000 0x10>;
652 #address-cells = <1>;
655 ti,hwmods = "epwmss4";
658 ehrpwm4: ehrpwm@48308200 {
659 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
661 reg = <0x48308200 0x80>;
662 ti,hwmods = "ehrpwm4";
667 epwmss5: epwmss@4830a000 {
668 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
669 reg = <0x4830a000 0x10>;
670 #address-cells = <1>;
673 ti,hwmods = "epwmss5";
676 ehrpwm5: ehrpwm@4830a200 {
677 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
679 reg = <0x4830a200 0x80>;
680 ti,hwmods = "ehrpwm5";
685 tscadc: tscadc@44e0d000 {
686 compatible = "ti,am3359-tscadc";
687 reg = <0x44e0d000 0x1000>;
688 ti,hwmods = "adc_tsc";
689 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&adc_tsc_fck>;
695 compatible = "ti,am3359-tsc";
699 #io-channel-cells = <1>;
700 compatible = "ti,am3359-adc";
705 sham: sham@53100000 {
706 compatible = "ti,omap5-sham";
708 reg = <0x53100000 0x300>;
711 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
715 compatible = "ti,omap4-aes";
717 reg = <0x53501000 0xa0>;
718 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
721 dma-names = "tx", "rx";
725 compatible = "ti,omap4-des";
727 reg = <0x53701000 0xa0>;
728 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
731 dma-names = "tx", "rx";
734 mcasp0: mcasp@48038000 {
735 compatible = "ti,am33xx-mcasp-audio";
736 ti,hwmods = "mcasp0";
737 reg = <0x48038000 0x2000>,
738 <0x46000000 0x400000>;
739 reg-names = "mpu", "dat";
740 interrupts = <80>, <81>;
741 interrupt-names = "tx", "rx";
745 dma-names = "tx", "rx";
748 mcasp1: mcasp@4803C000 {
749 compatible = "ti,am33xx-mcasp-audio";
750 ti,hwmods = "mcasp1";
751 reg = <0x4803C000 0x2000>,
752 <0x46400000 0x400000>;
753 reg-names = "mpu", "dat";
754 interrupts = <82>, <83>;
755 interrupt-names = "tx", "rx";
759 dma-names = "tx", "rx";
763 compatible = "ti,am3352-elm";
764 reg = <0x48080000 0x2000>;
765 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
767 clocks = <&l4ls_gclk>;
772 gpmc: gpmc@50000000 {
773 compatible = "ti,am3352-gpmc";
775 clocks = <&l3s_gclk>;
777 reg = <0x50000000 0x2000>;
778 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
780 gpmc,num-waitpins = <2>;
781 #address-cells = <2>;
786 am43xx_control_usb2phy1: control-phy@44e10620 {
787 compatible = "ti,control-phy-usb2-am437";
788 reg = <0x44e10620 0x4>;
792 am43xx_control_usb2phy2: control-phy@0x44e10628 {
793 compatible = "ti,control-phy-usb2-am437";
794 reg = <0x44e10628 0x4>;
798 ocp2scp0: ocp2scp@483a8000 {
799 compatible = "ti,omap-ocp2scp";
800 #address-cells = <1>;
803 ti,hwmods = "ocp2scp0";
805 usb2_phy1: phy@483a8000 {
806 compatible = "ti,am437x-usb2";
807 reg = <0x483a8000 0x8000>;
808 ctrl-module = <&am43xx_control_usb2phy1>;
809 clocks = <&usb_phy0_always_on_clk32k>,
810 <&usb_otg_ss0_refclk960m>;
811 clock-names = "wkupclk", "refclk";
817 ocp2scp1: ocp2scp@483e8000 {
818 compatible = "ti,omap-ocp2scp";
819 #address-cells = <1>;
822 ti,hwmods = "ocp2scp1";
824 usb2_phy2: phy@483e8000 {
825 compatible = "ti,am437x-usb2";
826 reg = <0x483e8000 0x8000>;
827 ctrl-module = <&am43xx_control_usb2phy2>;
828 clocks = <&usb_phy1_always_on_clk32k>,
829 <&usb_otg_ss1_refclk960m>;
830 clock-names = "wkupclk", "refclk";
836 dwc3_1: omap_dwc3@48380000 {
837 compatible = "ti,am437x-dwc3";
838 ti,hwmods = "usb_otg_ss0";
839 reg = <0x48380000 0x10000>;
840 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
841 #address-cells = <1>;
847 compatible = "synopsys,dwc3";
848 reg = <0x48390000 0x10000>;
849 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
851 phy-names = "usb2-phy";
852 maximum-speed = "high-speed";
855 snps,dis_u3_susphy_quirk;
856 snps,dis_u2_susphy_quirk;
860 dwc3_2: omap_dwc3@483c0000 {
861 compatible = "ti,am437x-dwc3";
862 ti,hwmods = "usb_otg_ss1";
863 reg = <0x483c0000 0x10000>;
864 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
865 #address-cells = <1>;
871 compatible = "synopsys,dwc3";
872 reg = <0x483d0000 0x10000>;
873 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
875 phy-names = "usb2-phy";
876 maximum-speed = "high-speed";
879 snps,dis_u3_susphy_quirk;
880 snps,dis_u2_susphy_quirk;
884 qspi: qspi@47900000 {
885 compatible = "ti,am4372-qspi";
886 reg = <0x47900000 0x100>;
887 #address-cells = <1>;
890 interrupts = <0 138 0x4>;
896 compatible = "ti,am43xx-hdq";
897 reg = <0x48347000 0x1000>;
898 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
899 clocks = <&func_12m_clk>;
906 compatible = "ti,omap3-dss";
907 reg = <0x4832a000 0x200>;
909 ti,hwmods = "dss_core";
910 clocks = <&disp_clk>;
912 #address-cells = <1>;
916 dispc: dispc@4832a400 {
917 compatible = "ti,omap3-dispc";
918 reg = <0x4832a400 0x400>;
919 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
920 ti,hwmods = "dss_dispc";
921 clocks = <&disp_clk>;
925 rfbi: rfbi@4832a800 {
926 compatible = "ti,omap3-rfbi";
927 reg = <0x4832a800 0x100>;
928 ti,hwmods = "dss_rfbi";
929 clocks = <&disp_clk>;
934 ocmcram: ocmcram@40300000 {
935 compatible = "mmio-sram";
936 reg = <0x40300000 0x40000>; /* 256k */
939 dcan0: can@481cc000 {
940 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
941 ti,hwmods = "d_can0";
942 clocks = <&dcan0_fck>;
944 reg = <0x481cc000 0x2000>;
945 syscon-raminit = <&am43xx_control_module 0x644 0>;
946 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
950 dcan1: can@481d0000 {
951 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
952 ti,hwmods = "d_can1";
953 clocks = <&dcan1_fck>;
955 reg = <0x481d0000 0x2000>;
956 syscon-raminit = <&am43xx_control_module 0x644 1>;
957 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
961 vpfe0: vpfe@48326000 {
962 compatible = "ti,am437x-vpfe";
963 reg = <0x48326000 0x2000>;
964 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
969 vpfe1: vpfe@48328000 {
970 compatible = "ti,am437x-vpfe";
971 reg = <0x48328000 0x2000>;
972 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
979 /include/ "am43xx-clocks.dtsi"