arch/arm/boot/dts/am4372.dtsi

   1 /*
   2  * Device Tree Source for AM4372 SoC
   3  *
   4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13
  14 #include "skeleton.dtsi"
  15
  16 / {
  17         compatible = "ti,am4372", "ti,am43";
  18         interrupt-parent = <&gic>;
  19
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 serial0 = &uart0;
  26                 ethernet0 = &cpsw_emac0;
  27                 ethernet1 = &cpsw_emac1;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33                 cpu@0 {
  34                         compatible = "arm,cortex-a9";
  35                         device_type = "cpu";
  36                         reg = <0>;
  37
  38                         clocks = <&dpll_mpu_ck>;
  39                         clock-names = "cpu";
  40
  41                         clock-latency = <300000>; /* From omap-cpufreq driver */
  42                 };
  43         };
  44
  45         gic: interrupt-controller@48241000 {
  46                 compatible = "arm,cortex-a9-gic";
  47                 interrupt-controller;
  48                 #interrupt-cells = <3>;
  49                 reg = <0x48241000 0x1000>,
  50                       <0x48240100 0x0100>;
  51         };
  52
  53         l2-cache-controller@48242000 {
  54                 compatible = "arm,pl310-cache";
  55                 reg = <0x48242000 0x1000>;
  56                 cache-unified;
  57                 cache-level = <2>;
  58         };
  59
  60         am43xx_pinmux: pinmux@44e10800 {
  61                 compatible = "pinctrl-single";
  62                 reg = <0x44e10800 0x31c>;
  63                 #address-cells = <1>;
  64                 #size-cells = <0>;
  65                 pinctrl-single,register-width = <32>;
  66                 pinctrl-single,function-mask = <0xffffffff>;
  67         };
  68
  69         ocp {
  70                 compatible = "ti,am4372-l3-noc", "simple-bus";
  71                 #address-cells = <1>;
  72                 #size-cells = <1>;
  73                 ranges;
  74                 ti,hwmods = "l3_main";
  75                 reg = <0x44000000 0x400000
  76                        0x44800000 0x400000>;
  77                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
  78                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  79
  80                 prcm: prcm@44df0000 {
  81                         compatible = "ti,am4-prcm";
  82                         reg = <0x44df0000 0x11000>;
  83
  84                         prcm_clocks: clocks {
  85                                 #address-cells = <1>;
  86                                 #size-cells = <0>;
  87                         };
  88
  89                         prcm_clockdomains: clockdomains {
  90                         };
  91                 };
  92
  93                 scrm: scrm@44e10000 {
  94                         compatible = "ti,am4-scrm";
  95                         reg = <0x44e10000 0x2000>;
  96
  97                         scrm_clocks: clocks {
  98                                 #address-cells = <1>;
  99                                 #size-cells = <0>;
 100                         };
 101
 102                         scrm_clockdomains: clockdomains {
 103                         };
 104                 };
 105
 106                 edma: edma@49000000 {
 107                         compatible = "ti,edma3";
 108                         ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
 109                         reg =   <0x49000000 0x10000>,
 110                                 <0x44e10f90 0x10>;
 111                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 112                                         <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 113                                         <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 114                         #dma-cells = <1>;
 115                         dma-channels = <64>;
 116                         ti,edma-regions = <4>;
 117                         ti,edma-slots = <256>;
 118                 };
 119
 120                 uart0: serial@44e09000 {
 121                         compatible = "ti,am4372-uart","ti,omap2-uart";
 122                         reg = <0x44e09000 0x2000>;
 123                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 124                         ti,hwmods = "uart1";
 125                 };
 126
 127                 uart1: serial@48022000 {
 128                         compatible = "ti,am4372-uart","ti,omap2-uart";
 129                         reg = <0x48022000 0x2000>;
 130                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 131                         ti,hwmods = "uart2";
 132                         status = "disabled";
 133                 };
 134
 135                 uart2: serial@48024000 {
 136                         compatible = "ti,am4372-uart","ti,omap2-uart";
 137                         reg = <0x48024000 0x2000>;
 138                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 139                         ti,hwmods = "uart3";
 140                         status = "disabled";
 141                 };
 142
 143                 uart3: serial@481a6000 {
 144                         compatible = "ti,am4372-uart","ti,omap2-uart";
 145                         reg = <0x481a6000 0x2000>;
 146                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 147                         ti,hwmods = "uart4";
 148                         status = "disabled";
 149                 };
 150
 151                 uart4: serial@481a8000 {
 152                         compatible = "ti,am4372-uart","ti,omap2-uart";
 153                         reg = <0x481a8000 0x2000>;
 154                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 155                         ti,hwmods = "uart5";
 156                         status = "disabled";
 157                 };
 158
 159                 uart5: serial@481aa000 {
 160                         compatible = "ti,am4372-uart","ti,omap2-uart";
 161                         reg = <0x481aa000 0x2000>;
 162                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 163                         ti,hwmods = "uart6";
 164                         status = "disabled";
 165                 };
 166
 167                 mailbox: mailbox@480C8000 {
 168                         compatible = "ti,omap4-mailbox";
 169                         reg = <0x480C8000 0x200>;
 170                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 171                         ti,hwmods = "mailbox";
 172                         ti,mbox-num-users = <4>;
 173                         ti,mbox-num-fifos = <8>;
 174                         ti,mbox-names = "wkup_m3";
 175                         ti,mbox-data = <0 0 0 0>;
 176                         status = "disabled";
 177                 };
 178
 179                 timer1: timer@44e31000 {
 180                         compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
 181                         reg = <0x44e31000 0x400>;
 182                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 183                         ti,timer-alwon;
 184                         ti,hwmods = "timer1";
 185                 };
 186
 187                 timer2: timer@48040000  {
 188                         compatible = "ti,am4372-timer","ti,am335x-timer";
 189                         reg = <0x48040000  0x400>;
 190                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 191                         ti,hwmods = "timer2";
 192                 };
 193
 194                 timer3: timer@48042000 {
 195                         compatible = "ti,am4372-timer","ti,am335x-timer";
 196                         reg = <0x48042000 0x400>;
 197                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 198                         ti,hwmods = "timer3";
 199                         status = "disabled";
 200                 };
 201
 202                 timer4: timer@48044000 {
 203                         compatible = "ti,am4372-timer","ti,am335x-timer";
 204                         reg = <0x48044000 0x400>;
 205                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
 206                         ti,timer-pwm;
 207                         ti,hwmods = "timer4";
 208                         status = "disabled";
 209                 };
 210
 211                 timer5: timer@48046000 {
 212                         compatible = "ti,am4372-timer","ti,am335x-timer";
 213                         reg = <0x48046000 0x400>;
 214                         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 215                         ti,timer-pwm;
 216                         ti,hwmods = "timer5";
 217                         status = "disabled";
 218                 };
 219
 220                 timer6: timer@48048000 {
 221                         compatible = "ti,am4372-timer","ti,am335x-timer";
 222                         reg = <0x48048000 0x400>;
 223                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 224                         ti,timer-pwm;
 225                         ti,hwmods = "timer6";
 226                         status = "disabled";
 227                 };
 228
 229                 timer7: timer@4804a000 {
 230                         compatible = "ti,am4372-timer","ti,am335x-timer";
 231                         reg = <0x4804a000 0x400>;
 232                         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
 233                         ti,timer-pwm;
 234                         ti,hwmods = "timer7";
 235                         status = "disabled";
 236                 };
 237
 238                 timer8: timer@481c1000 {
 239                         compatible = "ti,am4372-timer","ti,am335x-timer";
 240                         reg = <0x481c1000 0x400>;
 241                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 242                         ti,hwmods = "timer8";
 243                         status = "disabled";
 244                 };
 245
 246                 timer9: timer@4833d000 {
 247                         compatible = "ti,am4372-timer","ti,am335x-timer";
 248                         reg = <0x4833d000 0x400>;
 249                         interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
 250                         ti,hwmods = "timer9";
 251                         status = "disabled";
 252                 };
 253
 254                 timer10: timer@4833f000 {
 255                         compatible = "ti,am4372-timer","ti,am335x-timer";
 256                         reg = <0x4833f000 0x400>;
 257                         interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 258                         ti,hwmods = "timer10";
 259                         status = "disabled";
 260                 };
 261
 262                 timer11: timer@48341000 {
 263                         compatible = "ti,am4372-timer","ti,am335x-timer";
 264                         reg = <0x48341000 0x400>;
 265                         interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
 266                         ti,hwmods = "timer11";
 267                         status = "disabled";
 268                 };
 269
 270                 counter32k: counter@44e86000 {
 271                         compatible = "ti,am4372-counter32k","ti,omap-counter32k";
 272                         reg = <0x44e86000 0x40>;
 273                         ti,hwmods = "counter_32k";
 274                 };
 275
 276                 rtc@44e3e000 {
 277                         compatible = "ti,am4372-rtc","ti,da830-rtc";
 278                         reg = <0x44e3e000 0x1000>;
 279                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
 280                                       GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 281                         ti,hwmods = "rtc";
 282                         status = "disabled";
 283                 };
 284
 285                 wdt@44e35000 {
 286                         compatible = "ti,am4372-wdt","ti,omap3-wdt";
 287                         reg = <0x44e35000 0x1000>;
 288                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 289                         ti,hwmods = "wd_timer2";
 290                 };
 291
 292                 gpio0: gpio@44e07000 {
 293                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 294                         reg = <0x44e07000 0x1000>;
 295                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 296                         gpio-controller;
 297                         #gpio-cells = <2>;
 298                         interrupt-controller;
 299                         #interrupt-cells = <2>;
 300                         ti,hwmods = "gpio1";
 301                         status = "disabled";
 302                 };
 303
 304                 gpio1: gpio@4804c000 {
 305                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 306                         reg = <0x4804c000 0x1000>;
 307                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 308                         gpio-controller;
 309                         #gpio-cells = <2>;
 310                         interrupt-controller;
 311                         #interrupt-cells = <2>;
 312                         ti,hwmods = "gpio2";
 313                         status = "disabled";
 314                 };
 315
 316                 gpio2: gpio@481ac000 {
 317                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 318                         reg = <0x481ac000 0x1000>;
 319                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 320                         gpio-controller;
 321                         #gpio-cells = <2>;
 322                         interrupt-controller;
 323                         #interrupt-cells = <2>;
 324                         ti,hwmods = "gpio3";
 325                         status = "disabled";
 326                 };
 327
 328                 gpio3: gpio@481ae000 {
 329                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 330                         reg = <0x481ae000 0x1000>;
 331                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 332                         gpio-controller;
 333                         #gpio-cells = <2>;
 334                         interrupt-controller;
 335                         #interrupt-cells = <2>;
 336                         ti,hwmods = "gpio4";
 337                         status = "disabled";
 338                 };
 339
 340                 gpio4: gpio@48320000 {
 341                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 342                         reg = <0x48320000 0x1000>;
 343                         interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 344                         gpio-controller;
 345                         #gpio-cells = <2>;
 346                         interrupt-controller;
 347                         #interrupt-cells = <2>;
 348                         ti,hwmods = "gpio5";
 349                         status = "disabled";
 350                 };
 351
 352                 gpio5: gpio@48322000 {
 353                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 354                         reg = <0x48322000 0x1000>;
 355                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 356                         gpio-controller;
 357                         #gpio-cells = <2>;
 358                         interrupt-controller;
 359                         #interrupt-cells = <2>;
 360                         ti,hwmods = "gpio6";
 361                         status = "disabled";
 362                 };
 363
 364                 hwspinlock: spinlock@480ca000 {
 365                         compatible = "ti,omap4-hwspinlock";
 366                         reg = <0x480ca000 0x1000>;
 367                         ti,hwmods = "spinlock";
 368                         #hwlock-cells = <1>;
 369                 };
 370
 371                 i2c0: i2c@44e0b000 {
 372                         compatible = "ti,am4372-i2c","ti,omap4-i2c";
 373                         reg = <0x44e0b000 0x1000>;
 374                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 375                         ti,hwmods = "i2c1";
 376                         #address-cells = <1>;
 377                         #size-cells = <0>;
 378                         status = "disabled";
 379                 };
 380
 381                 i2c1: i2c@4802a000 {
 382                         compatible = "ti,am4372-i2c","ti,omap4-i2c";
 383                         reg = <0x4802a000 0x1000>;
 384                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 385                         ti,hwmods = "i2c2";
 386                         #address-cells = <1>;
 387                         #size-cells = <0>;
 388                         status = "disabled";
 389                 };
 390
 391                 i2c2: i2c@4819c000 {
 392                         compatible = "ti,am4372-i2c","ti,omap4-i2c";
 393                         reg = <0x4819c000 0x1000>;
 394                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 395                         ti,hwmods = "i2c3";
 396                         #address-cells = <1>;
 397                         #size-cells = <0>;
 398                         status = "disabled";
 399                 };
 400
 401                 spi0: spi@48030000 {
 402                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 403                         reg = <0x48030000 0x400>;
 404                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 405                         ti,hwmods = "spi0";
 406                         #address-cells = <1>;
 407                         #size-cells = <0>;
 408                         status = "disabled";
 409                 };
 410
 411                 mmc1: mmc@48060000 {
 412                         compatible = "ti,omap4-hsmmc";
 413                         reg = <0x48060000 0x1000>;
 414                         ti,hwmods = "mmc1";
 415                         ti,dual-volt;
 416                         ti,needs-special-reset;
 417                         dmas = <&edma 24
 418                                 &edma 25>;
 419                         dma-names = "tx", "rx";
 420                         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
 421                         status = "disabled";
 422                 };
 423
 424                 mmc2: mmc@481d8000 {
 425                         compatible = "ti,omap4-hsmmc";
 426                         reg = <0x481d8000 0x1000>;
 427                         ti,hwmods = "mmc2";
 428                         ti,needs-special-reset;
 429                         dmas = <&edma 2
 430                                 &edma 3>;
 431                         dma-names = "tx", "rx";
 432                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 433                         status = "disabled";
 434                 };
 435
 436                 mmc3: mmc@47810000 {
 437                         compatible = "ti,omap4-hsmmc";
 438                         reg = <0x47810000 0x1000>;
 439                         ti,hwmods = "mmc3";
 440                         ti,needs-special-reset;
 441                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 442                         status = "disabled";
 443                 };
 444
 445                 spi1: spi@481a0000 {
 446                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 447                         reg = <0x481a0000 0x400>;
 448                         interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 449                         ti,hwmods = "spi1";
 450                         #address-cells = <1>;
 451                         #size-cells = <0>;
 452                         status = "disabled";
 453                 };
 454
 455                 spi2: spi@481a2000 {
 456                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 457                         reg = <0x481a2000 0x400>;
 458                         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 459                         ti,hwmods = "spi2";
 460                         #address-cells = <1>;
 461                         #size-cells = <0>;
 462                         status = "disabled";
 463                 };
 464
 465                 spi3: spi@481a4000 {
 466                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 467                         reg = <0x481a4000 0x400>;
 468                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
 469                         ti,hwmods = "spi3";
 470                         #address-cells = <1>;
 471                         #size-cells = <0>;
 472                         status = "disabled";
 473                 };
 474
 475                 spi4: spi@48345000 {
 476                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 477                         reg = <0x48345000 0x400>;
 478                         interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
 479                         ti,hwmods = "spi4";
 480                         #address-cells = <1>;
 481                         #size-cells = <0>;
 482                         status = "disabled";
 483                 };
 484
 485                 mac: ethernet@4a100000 {
 486                         compatible = "ti,am4372-cpsw","ti,cpsw";
 487                         reg = <0x4a100000 0x800
 488                                0x4a101200 0x100>;
 489                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
 490                                       GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
 491                                       GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
 492                                       GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 493                         #address-cells = <1>;
 494                         #size-cells = <1>;
 495                         ti,hwmods = "cpgmac0";
 496                         status = "disabled";
 497                         cpdma_channels = <8>;
 498                         ale_entries = <1024>;
 499                         bd_ram_size = <0x2000>;
 500                         no_bd_ram = <0>;
 501                         rx_descs = <64>;
 502                         mac_control = <0x20>;
 503                         slaves = <2>;
 504                         active_slave = <0>;
 505                         cpts_clock_mult = <0x80000000>;
 506                         cpts_clock_shift = <29>;
 507                         ranges;
 508
 509                         davinci_mdio: mdio@4a101000 {
 510                                 compatible = "ti,am4372-mdio","ti,davinci_mdio";
 511                                 reg = <0x4a101000 0x100>;
 512                                 #address-cells = <1>;
 513                                 #size-cells = <0>;
 514                                 ti,hwmods = "davinci_mdio";
 515                                 bus_freq = <1000000>;
 516                                 status = "disabled";
 517                         };
 518
 519                         cpsw_emac0: slave@4a100200 {
 520                                 /* Filled in by U-Boot */
 521                                 mac-address = [ 00 00 00 00 00 00 ];
 522                         };
 523
 524                         cpsw_emac1: slave@4a100300 {
 525                                 /* Filled in by U-Boot */
 526                                 mac-address = [ 00 00 00 00 00 00 ];
 527                         };
 528                 };
 529
 530                 epwmss0: epwmss@48300000 {
 531                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 532                         reg = <0x48300000 0x10>;
 533                         #address-cells = <1>;
 534                         #size-cells = <1>;
 535                         ranges;
 536                         ti,hwmods = "epwmss0";
 537                         status = "disabled";
 538
 539                         ecap0: ecap@48300100 {
 540                                 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
 541                                 #pwm-cells = <3>;
 542                                 reg = <0x48300100 0x80>;
 543                                 ti,hwmods = "ecap0";
 544                                 status = "disabled";
 545                         };
 546
 547                         ehrpwm0: ehrpwm@48300200 {
 548                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 549                                 #pwm-cells = <3>;
 550                                 reg = <0x48300200 0x80>;
 551                                 ti,hwmods = "ehrpwm0";
 552                                 status = "disabled";
 553                         };
 554                 };
 555
 556                 epwmss1: epwmss@48302000 {
 557                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 558                         reg = <0x48302000 0x10>;
 559                         #address-cells = <1>;
 560                         #size-cells = <1>;
 561                         ranges;
 562                         ti,hwmods = "epwmss1";
 563                         status = "disabled";
 564
 565                         ecap1: ecap@48302100 {
 566                                 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
 567                                 #pwm-cells = <3>;
 568                                 reg = <0x48302100 0x80>;
 569                                 ti,hwmods = "ecap1";
 570                                 status = "disabled";
 571                         };
 572
 573                         ehrpwm1: ehrpwm@48302200 {
 574                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 575                                 #pwm-cells = <3>;
 576                                 reg = <0x48302200 0x80>;
 577                                 ti,hwmods = "ehrpwm1";
 578                                 status = "disabled";
 579                         };
 580                 };
 581
 582                 epwmss2: epwmss@48304000 {
 583                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 584                         reg = <0x48304000 0x10>;
 585                         #address-cells = <1>;
 586                         #size-cells = <1>;
 587                         ranges;
 588                         ti,hwmods = "epwmss2";
 589                         status = "disabled";
 590
 591                         ecap2: ecap@48304100 {
 592                                 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
 593                                 #pwm-cells = <3>;
 594                                 reg = <0x48304100 0x80>;
 595                                 ti,hwmods = "ecap2";
 596                                 status = "disabled";
 597                         };
 598
 599                         ehrpwm2: ehrpwm@48304200 {
 600                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 601                                 #pwm-cells = <3>;
 602                                 reg = <0x48304200 0x80>;
 603                                 ti,hwmods = "ehrpwm2";
 604                                 status = "disabled";
 605                         };
 606                 };
 607
 608                 epwmss3: epwmss@48306000 {
 609                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 610                         reg = <0x48306000 0x10>;
 611                         #address-cells = <1>;
 612                         #size-cells = <1>;
 613                         ranges;
 614                         ti,hwmods = "epwmss3";
 615                         status = "disabled";
 616
 617                         ehrpwm3: ehrpwm@48306200 {
 618                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 619                                 #pwm-cells = <3>;
 620                                 reg = <0x48306200 0x80>;
 621                                 ti,hwmods = "ehrpwm3";
 622                                 status = "disabled";
 623                         };
 624                 };
 625
 626                 epwmss4: epwmss@48308000 {
 627                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 628                         reg = <0x48308000 0x10>;
 629                         #address-cells = <1>;
 630                         #size-cells = <1>;
 631                         ranges;
 632                         ti,hwmods = "epwmss4";
 633                         status = "disabled";
 634
 635                         ehrpwm4: ehrpwm@48308200 {
 636                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 637                                 #pwm-cells = <3>;
 638                                 reg = <0x48308200 0x80>;
 639                                 ti,hwmods = "ehrpwm4";
 640                                 status = "disabled";
 641                         };
 642                 };
 643
 644                 epwmss5: epwmss@4830a000 {
 645                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 646                         reg = <0x4830a000 0x10>;
 647                         #address-cells = <1>;
 648                         #size-cells = <1>;
 649                         ranges;
 650                         ti,hwmods = "epwmss5";
 651                         status = "disabled";
 652
 653                         ehrpwm5: ehrpwm@4830a200 {
 654                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 655                                 #pwm-cells = <3>;
 656                                 reg = <0x4830a200 0x80>;
 657                                 ti,hwmods = "ehrpwm5";
 658                                 status = "disabled";
 659                         };
 660                 };
 661
 662                 sham: sham@53100000 {
 663                         compatible = "ti,omap5-sham";
 664                         ti,hwmods = "sham";
 665                         reg = <0x53100000 0x300>;
 666                         dmas = <&edma 36>;
 667                         dma-names = "rx";
 668                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 669                 };
 670
 671                 aes: aes@53501000 {
 672                         compatible = "ti,omap4-aes";
 673                         ti,hwmods = "aes";
 674                         reg = <0x53501000 0xa0>;
 675                         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 676                         dmas = <&edma 6
 677                                 &edma 5>;
 678                         dma-names = "tx", "rx";
 679                 };
 680
 681                 des: des@53701000 {
 682                         compatible = "ti,omap4-des";
 683                         ti,hwmods = "des";
 684                         reg = <0x53701000 0xa0>;
 685                         interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 686                         dmas = <&edma 34
 687                                 &edma 33>;
 688                         dma-names = "tx", "rx";
 689                 };
 690
 691                 mcasp0: mcasp@48038000 {
 692                         compatible = "ti,am33xx-mcasp-audio";
 693                         ti,hwmods = "mcasp0";
 694                         reg = <0x48038000 0x2000>,
 695                               <0x46000000 0x400000>;
 696                         reg-names = "mpu", "dat";
 697                         interrupts = <80>, <81>;
 698                         interrupt-names = "tx", "rx";
 699                         status = "disabled";
 700                         dmas = <&edma 8>,
 701                                <&edma 9>;
 702                         dma-names = "tx", "rx";
 703                 };
 704
 705                 mcasp1: mcasp@4803C000 {
 706                         compatible = "ti,am33xx-mcasp-audio";
 707                         ti,hwmods = "mcasp1";
 708                         reg = <0x4803C000 0x2000>,
 709                               <0x46400000 0x400000>;
 710                         reg-names = "mpu", "dat";
 711                         interrupts = <82>, <83>;
 712                         interrupt-names = "tx", "rx";
 713                         status = "disabled";
 714                         dmas = <&edma 10>,
 715                                <&edma 11>;
 716                         dma-names = "tx", "rx";
 717                 };
 718
 719                 elm: elm@48080000 {
 720                         compatible = "ti,am3352-elm";
 721                         reg = <0x48080000 0x2000>;
 722                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 723                         ti,hwmods = "elm";
 724                         clocks = <&l4ls_gclk>;
 725                         clock-names = "fck";
 726                         status = "disabled";
 727                 };
 728
 729                 gpmc: gpmc@50000000 {
 730                         compatible = "ti,am3352-gpmc";
 731                         ti,hwmods = "gpmc";
 732                         clocks = <&l3s_gclk>;
 733                         clock-names = "fck";
 734                         reg = <0x50000000 0x2000>;
 735                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 736                         gpmc,num-cs = <7>;
 737                         gpmc,num-waitpins = <2>;
 738                         #address-cells = <2>;
 739                         #size-cells = <1>;
 740                         status = "disabled";
 741                 };
 742         };
 743 };
 744
 745 /include/ "am43xx-clocks.dtsi"