2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&gic>;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
34 compatible = "arm,cortex-a9";
38 clocks = <&dpll_mpu_ck>;
41 clock-latency = <300000>; /* From omap-cpufreq driver */
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
53 l2-cache-controller@48242000 {
54 compatible = "arm,pl310-cache";
55 reg = <0x48242000 0x1000>;
60 am43xx_control_module: control_module@4a002000 {
61 compatible = "syscon";
62 reg = <0x44e10000 0x7f4>;
65 am43xx_pinmux: pinmux@44e10800 {
66 compatible = "ti,am437-padconf", "pinctrl-single";
67 reg = <0x44e10800 0x31c>;
70 #interrupt-cells = <1>;
72 pinctrl-single,register-width = <32>;
73 pinctrl-single,function-mask = <0xffffffff>;
77 compatible = "ti,am4372-l3-noc", "simple-bus";
81 ti,hwmods = "l3_main";
82 reg = <0x44000000 0x400000
84 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
85 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
88 compatible = "ti,am4-prcm";
89 reg = <0x44df0000 0x11000>;
96 prcm_clockdomains: clockdomains {
100 scrm: scrm@44e10000 {
101 compatible = "ti,am4-scrm";
102 reg = <0x44e10000 0x2000>;
104 scrm_clocks: clocks {
105 #address-cells = <1>;
109 scrm_clockdomains: clockdomains {
113 edma: edma@49000000 {
114 compatible = "ti,edma3";
115 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
116 reg = <0x49000000 0x10000>,
118 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
119 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
120 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
124 uart0: serial@44e09000 {
125 compatible = "ti,am4372-uart","ti,omap2-uart";
126 reg = <0x44e09000 0x2000>;
127 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
131 uart1: serial@48022000 {
132 compatible = "ti,am4372-uart","ti,omap2-uart";
133 reg = <0x48022000 0x2000>;
134 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
139 uart2: serial@48024000 {
140 compatible = "ti,am4372-uart","ti,omap2-uart";
141 reg = <0x48024000 0x2000>;
142 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
147 uart3: serial@481a6000 {
148 compatible = "ti,am4372-uart","ti,omap2-uart";
149 reg = <0x481a6000 0x2000>;
150 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
155 uart4: serial@481a8000 {
156 compatible = "ti,am4372-uart","ti,omap2-uart";
157 reg = <0x481a8000 0x2000>;
158 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
163 uart5: serial@481aa000 {
164 compatible = "ti,am4372-uart","ti,omap2-uart";
165 reg = <0x481aa000 0x2000>;
166 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
171 mailbox: mailbox@480C8000 {
172 compatible = "ti,omap4-mailbox";
173 reg = <0x480C8000 0x200>;
174 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
175 ti,hwmods = "mailbox";
177 ti,mbox-num-users = <4>;
178 ti,mbox-num-fifos = <8>;
179 mbox_wkupm3: wkup_m3 {
180 ti,mbox-tx = <0 0 0>;
181 ti,mbox-rx = <0 0 3>;
185 timer1: timer@44e31000 {
186 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
187 reg = <0x44e31000 0x400>;
188 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
190 ti,hwmods = "timer1";
193 timer2: timer@48040000 {
194 compatible = "ti,am4372-timer","ti,am335x-timer";
195 reg = <0x48040000 0x400>;
196 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
197 ti,hwmods = "timer2";
200 timer3: timer@48042000 {
201 compatible = "ti,am4372-timer","ti,am335x-timer";
202 reg = <0x48042000 0x400>;
203 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
204 ti,hwmods = "timer3";
208 timer4: timer@48044000 {
209 compatible = "ti,am4372-timer","ti,am335x-timer";
210 reg = <0x48044000 0x400>;
211 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
213 ti,hwmods = "timer4";
217 timer5: timer@48046000 {
218 compatible = "ti,am4372-timer","ti,am335x-timer";
219 reg = <0x48046000 0x400>;
220 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
222 ti,hwmods = "timer5";
226 timer6: timer@48048000 {
227 compatible = "ti,am4372-timer","ti,am335x-timer";
228 reg = <0x48048000 0x400>;
229 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
231 ti,hwmods = "timer6";
235 timer7: timer@4804a000 {
236 compatible = "ti,am4372-timer","ti,am335x-timer";
237 reg = <0x4804a000 0x400>;
238 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
240 ti,hwmods = "timer7";
244 timer8: timer@481c1000 {
245 compatible = "ti,am4372-timer","ti,am335x-timer";
246 reg = <0x481c1000 0x400>;
247 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
248 ti,hwmods = "timer8";
252 timer9: timer@4833d000 {
253 compatible = "ti,am4372-timer","ti,am335x-timer";
254 reg = <0x4833d000 0x400>;
255 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
256 ti,hwmods = "timer9";
260 timer10: timer@4833f000 {
261 compatible = "ti,am4372-timer","ti,am335x-timer";
262 reg = <0x4833f000 0x400>;
263 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
264 ti,hwmods = "timer10";
268 timer11: timer@48341000 {
269 compatible = "ti,am4372-timer","ti,am335x-timer";
270 reg = <0x48341000 0x400>;
271 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
272 ti,hwmods = "timer11";
276 counter32k: counter@44e86000 {
277 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
278 reg = <0x44e86000 0x40>;
279 ti,hwmods = "counter_32k";
283 compatible = "ti,am4372-rtc","ti,da830-rtc";
284 reg = <0x44e3e000 0x1000>;
285 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
286 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
292 compatible = "ti,am4372-wdt","ti,omap3-wdt";
293 reg = <0x44e35000 0x1000>;
294 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
295 ti,hwmods = "wd_timer2";
298 gpio0: gpio@44e07000 {
299 compatible = "ti,am4372-gpio","ti,omap4-gpio";
300 reg = <0x44e07000 0x1000>;
301 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
304 interrupt-controller;
305 #interrupt-cells = <2>;
310 gpio1: gpio@4804c000 {
311 compatible = "ti,am4372-gpio","ti,omap4-gpio";
312 reg = <0x4804c000 0x1000>;
313 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
316 interrupt-controller;
317 #interrupt-cells = <2>;
322 gpio2: gpio@481ac000 {
323 compatible = "ti,am4372-gpio","ti,omap4-gpio";
324 reg = <0x481ac000 0x1000>;
325 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
328 interrupt-controller;
329 #interrupt-cells = <2>;
334 gpio3: gpio@481ae000 {
335 compatible = "ti,am4372-gpio","ti,omap4-gpio";
336 reg = <0x481ae000 0x1000>;
337 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
340 interrupt-controller;
341 #interrupt-cells = <2>;
346 gpio4: gpio@48320000 {
347 compatible = "ti,am4372-gpio","ti,omap4-gpio";
348 reg = <0x48320000 0x1000>;
349 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
352 interrupt-controller;
353 #interrupt-cells = <2>;
358 gpio5: gpio@48322000 {
359 compatible = "ti,am4372-gpio","ti,omap4-gpio";
360 reg = <0x48322000 0x1000>;
361 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
364 interrupt-controller;
365 #interrupt-cells = <2>;
370 hwspinlock: spinlock@480ca000 {
371 compatible = "ti,omap4-hwspinlock";
372 reg = <0x480ca000 0x1000>;
373 ti,hwmods = "spinlock";
378 compatible = "ti,am4372-i2c","ti,omap4-i2c";
379 reg = <0x44e0b000 0x1000>;
380 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
382 #address-cells = <1>;
388 compatible = "ti,am4372-i2c","ti,omap4-i2c";
389 reg = <0x4802a000 0x1000>;
390 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
392 #address-cells = <1>;
398 compatible = "ti,am4372-i2c","ti,omap4-i2c";
399 reg = <0x4819c000 0x1000>;
400 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
402 #address-cells = <1>;
408 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
409 reg = <0x48030000 0x400>;
410 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
412 #address-cells = <1>;
418 compatible = "ti,omap4-hsmmc";
419 reg = <0x48060000 0x1000>;
422 ti,needs-special-reset;
425 dma-names = "tx", "rx";
426 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
431 compatible = "ti,omap4-hsmmc";
432 reg = <0x481d8000 0x1000>;
434 ti,needs-special-reset;
437 dma-names = "tx", "rx";
438 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
443 compatible = "ti,omap4-hsmmc";
444 reg = <0x47810000 0x1000>;
446 ti,needs-special-reset;
447 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
452 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
453 reg = <0x481a0000 0x400>;
454 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
456 #address-cells = <1>;
462 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
463 reg = <0x481a2000 0x400>;
464 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
466 #address-cells = <1>;
472 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
473 reg = <0x481a4000 0x400>;
474 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
476 #address-cells = <1>;
482 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
483 reg = <0x48345000 0x400>;
484 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
486 #address-cells = <1>;
491 mac: ethernet@4a100000 {
492 compatible = "ti,am4372-cpsw","ti,cpsw";
493 reg = <0x4a100000 0x800
495 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
496 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
497 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
498 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
499 #address-cells = <1>;
501 ti,hwmods = "cpgmac0";
502 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
503 clock-names = "fck", "cpts";
505 cpdma_channels = <8>;
506 ale_entries = <1024>;
507 bd_ram_size = <0x2000>;
510 mac_control = <0x20>;
513 cpts_clock_mult = <0x80000000>;
514 cpts_clock_shift = <29>;
517 davinci_mdio: mdio@4a101000 {
518 compatible = "ti,am4372-mdio","ti,davinci_mdio";
519 reg = <0x4a101000 0x100>;
520 #address-cells = <1>;
522 ti,hwmods = "davinci_mdio";
523 bus_freq = <1000000>;
527 cpsw_emac0: slave@4a100200 {
528 /* Filled in by U-Boot */
529 mac-address = [ 00 00 00 00 00 00 ];
532 cpsw_emac1: slave@4a100300 {
533 /* Filled in by U-Boot */
534 mac-address = [ 00 00 00 00 00 00 ];
537 phy_sel: cpsw-phy-sel@44e10650 {
538 compatible = "ti,am43xx-cpsw-phy-sel";
539 reg= <0x44e10650 0x4>;
540 reg-names = "gmii-sel";
544 epwmss0: epwmss@48300000 {
545 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
546 reg = <0x48300000 0x10>;
547 #address-cells = <1>;
550 ti,hwmods = "epwmss0";
553 ecap0: ecap@48300100 {
554 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
556 reg = <0x48300100 0x80>;
561 ehrpwm0: ehrpwm@48300200 {
562 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
564 reg = <0x48300200 0x80>;
565 ti,hwmods = "ehrpwm0";
570 epwmss1: epwmss@48302000 {
571 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
572 reg = <0x48302000 0x10>;
573 #address-cells = <1>;
576 ti,hwmods = "epwmss1";
579 ecap1: ecap@48302100 {
580 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
582 reg = <0x48302100 0x80>;
587 ehrpwm1: ehrpwm@48302200 {
588 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
590 reg = <0x48302200 0x80>;
591 ti,hwmods = "ehrpwm1";
596 epwmss2: epwmss@48304000 {
597 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
598 reg = <0x48304000 0x10>;
599 #address-cells = <1>;
602 ti,hwmods = "epwmss2";
605 ecap2: ecap@48304100 {
606 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
608 reg = <0x48304100 0x80>;
613 ehrpwm2: ehrpwm@48304200 {
614 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
616 reg = <0x48304200 0x80>;
617 ti,hwmods = "ehrpwm2";
622 epwmss3: epwmss@48306000 {
623 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
624 reg = <0x48306000 0x10>;
625 #address-cells = <1>;
628 ti,hwmods = "epwmss3";
631 ehrpwm3: ehrpwm@48306200 {
632 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
634 reg = <0x48306200 0x80>;
635 ti,hwmods = "ehrpwm3";
640 epwmss4: epwmss@48308000 {
641 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
642 reg = <0x48308000 0x10>;
643 #address-cells = <1>;
646 ti,hwmods = "epwmss4";
649 ehrpwm4: ehrpwm@48308200 {
650 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
652 reg = <0x48308200 0x80>;
653 ti,hwmods = "ehrpwm4";
658 epwmss5: epwmss@4830a000 {
659 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
660 reg = <0x4830a000 0x10>;
661 #address-cells = <1>;
664 ti,hwmods = "epwmss5";
667 ehrpwm5: ehrpwm@4830a200 {
668 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
670 reg = <0x4830a200 0x80>;
671 ti,hwmods = "ehrpwm5";
676 tscadc: tscadc@44e0d000 {
677 compatible = "ti,am3359-tscadc";
678 reg = <0x44e0d000 0x1000>;
679 ti,hwmods = "adc_tsc";
680 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
681 clocks = <&adc_tsc_fck>;
686 compatible = "ti,am3359-tsc";
690 #io-channel-cells = <1>;
691 compatible = "ti,am3359-adc";
696 sham: sham@53100000 {
697 compatible = "ti,omap5-sham";
699 reg = <0x53100000 0x300>;
702 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
706 compatible = "ti,omap4-aes";
708 reg = <0x53501000 0xa0>;
709 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
712 dma-names = "tx", "rx";
716 compatible = "ti,omap4-des";
718 reg = <0x53701000 0xa0>;
719 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
722 dma-names = "tx", "rx";
725 mcasp0: mcasp@48038000 {
726 compatible = "ti,am33xx-mcasp-audio";
727 ti,hwmods = "mcasp0";
728 reg = <0x48038000 0x2000>,
729 <0x46000000 0x400000>;
730 reg-names = "mpu", "dat";
731 interrupts = <80>, <81>;
732 interrupt-names = "tx", "rx";
736 dma-names = "tx", "rx";
739 mcasp1: mcasp@4803C000 {
740 compatible = "ti,am33xx-mcasp-audio";
741 ti,hwmods = "mcasp1";
742 reg = <0x4803C000 0x2000>,
743 <0x46400000 0x400000>;
744 reg-names = "mpu", "dat";
745 interrupts = <82>, <83>;
746 interrupt-names = "tx", "rx";
750 dma-names = "tx", "rx";
754 compatible = "ti,am3352-elm";
755 reg = <0x48080000 0x2000>;
756 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
758 clocks = <&l4ls_gclk>;
763 gpmc: gpmc@50000000 {
764 compatible = "ti,am3352-gpmc";
766 clocks = <&l3s_gclk>;
768 reg = <0x50000000 0x2000>;
769 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
771 gpmc,num-waitpins = <2>;
772 #address-cells = <2>;
777 am43xx_control_usb2phy1: control-phy@44e10620 {
778 compatible = "ti,control-phy-usb2-am437";
779 reg = <0x44e10620 0x4>;
783 am43xx_control_usb2phy2: control-phy@0x44e10628 {
784 compatible = "ti,control-phy-usb2-am437";
785 reg = <0x44e10628 0x4>;
789 ocp2scp0: ocp2scp@483a8000 {
790 compatible = "ti,omap-ocp2scp";
791 #address-cells = <1>;
794 ti,hwmods = "ocp2scp0";
796 usb2_phy1: phy@483a8000 {
797 compatible = "ti,am437x-usb2";
798 reg = <0x483a8000 0x8000>;
799 ctrl-module = <&am43xx_control_usb2phy1>;
800 clocks = <&usb_phy0_always_on_clk32k>,
801 <&usb_otg_ss0_refclk960m>;
802 clock-names = "wkupclk", "refclk";
808 ocp2scp1: ocp2scp@483e8000 {
809 compatible = "ti,omap-ocp2scp";
810 #address-cells = <1>;
813 ti,hwmods = "ocp2scp1";
815 usb2_phy2: phy@483e8000 {
816 compatible = "ti,am437x-usb2";
817 reg = <0x483e8000 0x8000>;
818 ctrl-module = <&am43xx_control_usb2phy2>;
819 clocks = <&usb_phy1_always_on_clk32k>,
820 <&usb_otg_ss1_refclk960m>;
821 clock-names = "wkupclk", "refclk";
827 dwc3_1: omap_dwc3@48380000 {
828 compatible = "ti,am437x-dwc3";
829 ti,hwmods = "usb_otg_ss0";
830 reg = <0x48380000 0x10000>;
831 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
832 #address-cells = <1>;
838 compatible = "synopsys,dwc3";
839 reg = <0x48390000 0x10000>;
840 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
842 phy-names = "usb2-phy";
843 maximum-speed = "high-speed";
846 snps,dis_u3_susphy_quirk;
847 snps,dis_u2_susphy_quirk;
851 dwc3_2: omap_dwc3@483c0000 {
852 compatible = "ti,am437x-dwc3";
853 ti,hwmods = "usb_otg_ss1";
854 reg = <0x483c0000 0x10000>;
855 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
856 #address-cells = <1>;
862 compatible = "synopsys,dwc3";
863 reg = <0x483d0000 0x10000>;
864 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
866 phy-names = "usb2-phy";
867 maximum-speed = "high-speed";
870 snps,dis_u3_susphy_quirk;
871 snps,dis_u2_susphy_quirk;
875 qspi: qspi@47900000 {
876 compatible = "ti,am4372-qspi";
877 reg = <0x47900000 0x100>;
878 #address-cells = <1>;
881 interrupts = <0 138 0x4>;
887 compatible = "ti,am43xx-hdq";
888 reg = <0x48347000 0x1000>;
889 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
890 clocks = <&func_12m_clk>;
897 compatible = "ti,omap3-dss";
898 reg = <0x4832a000 0x200>;
900 ti,hwmods = "dss_core";
901 clocks = <&disp_clk>;
903 #address-cells = <1>;
907 dispc: dispc@4832a400 {
908 compatible = "ti,omap3-dispc";
909 reg = <0x4832a400 0x400>;
910 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
911 ti,hwmods = "dss_dispc";
912 clocks = <&disp_clk>;
916 rfbi: rfbi@4832a800 {
917 compatible = "ti,omap3-rfbi";
918 reg = <0x4832a800 0x100>;
919 ti,hwmods = "dss_rfbi";
920 clocks = <&disp_clk>;
925 ocmcram: ocmcram@40300000 {
926 compatible = "mmio-sram";
927 reg = <0x40300000 0x40000>; /* 256k */
930 dcan0: can@481cc000 {
931 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
932 ti,hwmods = "d_can0";
933 clocks = <&dcan0_fck>;
935 reg = <0x481cc000 0x2000>;
936 syscon-raminit = <&am43xx_control_module 0x644 0>;
937 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
941 dcan1: can@481d0000 {
942 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
943 ti,hwmods = "d_can1";
944 clocks = <&dcan1_fck>;
946 reg = <0x481d0000 0x2000>;
947 syscon-raminit = <&am43xx_control_module 0x644 1>;
948 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
954 /include/ "am43xx-clocks.dtsi"