2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
44 compatible = "arm,cortex-a8";
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
60 voltage-tolerance = <2>; /* 2 percentage */
62 clocks = <&dpll_mpu_ck>;
65 clock-latency = <300000>; /* From omap-cpufreq driver */
70 compatible = "arm,cortex-a8-pmu";
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
79 compatible = "ti,omap-infra";
81 compatible = "ti,omap3-mpu";
86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
96 * XXX: Use a flat representation of the AM33XX interconnect.
97 * The real AM33XX interconnect network is quite complex. Since
98 * it will not bring real advantage to represent that in DT
99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
103 compatible = "simple-bus";
104 #address-cells = <1>;
107 ti,hwmods = "l3_main";
109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
113 prcm_clocks: clocks {
114 #address-cells = <1>;
118 prcm_clockdomains: clockdomains {
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
126 scrm_clocks: clocks {
127 #address-cells = <1>;
131 scrm_clockdomains: clockdomains {
135 intc: interrupt-controller@48200000 {
136 compatible = "ti,omap2-intc";
137 interrupt-controller;
138 #interrupt-cells = <1>;
139 ti,intc-size = <128>;
140 reg = <0x48200000 0x1000>;
143 edma: edma@49000000 {
144 compatible = "ti,edma3";
145 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
146 reg = <0x49000000 0x10000>,
148 interrupts = <12 13 14>;
152 gpio0: gpio@44e07000 {
153 compatible = "ti,omap4-gpio";
157 interrupt-controller;
158 #interrupt-cells = <2>;
159 reg = <0x44e07000 0x1000>;
163 gpio1: gpio@4804c000 {
164 compatible = "ti,omap4-gpio";
168 interrupt-controller;
169 #interrupt-cells = <2>;
170 reg = <0x4804c000 0x1000>;
174 gpio2: gpio@481ac000 {
175 compatible = "ti,omap4-gpio";
179 interrupt-controller;
180 #interrupt-cells = <2>;
181 reg = <0x481ac000 0x1000>;
185 gpio3: gpio@481ae000 {
186 compatible = "ti,omap4-gpio";
190 interrupt-controller;
191 #interrupt-cells = <2>;
192 reg = <0x481ae000 0x1000>;
196 uart0: serial@44e09000 {
197 compatible = "ti,omap3-uart";
199 clock-frequency = <48000000>;
200 reg = <0x44e09000 0x2000>;
205 uart1: serial@48022000 {
206 compatible = "ti,omap3-uart";
208 clock-frequency = <48000000>;
209 reg = <0x48022000 0x2000>;
214 uart2: serial@48024000 {
215 compatible = "ti,omap3-uart";
217 clock-frequency = <48000000>;
218 reg = <0x48024000 0x2000>;
223 uart3: serial@481a6000 {
224 compatible = "ti,omap3-uart";
226 clock-frequency = <48000000>;
227 reg = <0x481a6000 0x2000>;
232 uart4: serial@481a8000 {
233 compatible = "ti,omap3-uart";
235 clock-frequency = <48000000>;
236 reg = <0x481a8000 0x2000>;
241 uart5: serial@481aa000 {
242 compatible = "ti,omap3-uart";
244 clock-frequency = <48000000>;
245 reg = <0x481aa000 0x2000>;
251 compatible = "ti,omap4-i2c";
252 #address-cells = <1>;
255 reg = <0x44e0b000 0x1000>;
261 compatible = "ti,omap4-i2c";
262 #address-cells = <1>;
265 reg = <0x4802a000 0x1000>;
271 compatible = "ti,omap4-i2c";
272 #address-cells = <1>;
275 reg = <0x4819c000 0x1000>;
281 compatible = "ti,omap4-hsmmc";
284 ti,needs-special-reset;
285 ti,needs-special-hs-handling;
288 dma-names = "tx", "rx";
290 interrupt-parent = <&intc>;
291 reg = <0x48060000 0x1000>;
296 compatible = "ti,omap4-hsmmc";
298 ti,needs-special-reset;
301 dma-names = "tx", "rx";
303 interrupt-parent = <&intc>;
304 reg = <0x481d8000 0x1000>;
309 compatible = "ti,omap4-hsmmc";
311 ti,needs-special-reset;
313 interrupt-parent = <&intc>;
314 reg = <0x47810000 0x1000>;
318 hwspinlock: spinlock@480ca000 {
319 compatible = "ti,omap4-hwspinlock";
320 reg = <0x480ca000 0x1000>;
321 ti,hwmods = "spinlock";
326 compatible = "ti,omap3-wdt";
327 ti,hwmods = "wd_timer2";
328 reg = <0x44e35000 0x1000>;
332 dcan0: d_can@481cc000 {
333 compatible = "bosch,d_can";
334 ti,hwmods = "d_can0";
335 reg = <0x481cc000 0x2000
341 dcan1: d_can@481d0000 {
342 compatible = "bosch,d_can";
343 ti,hwmods = "d_can1";
344 reg = <0x481d0000 0x2000
350 mailbox: mailbox@480C8000 {
351 compatible = "ti,omap4-mailbox";
352 reg = <0x480C8000 0x200>;
354 ti,hwmods = "mailbox";
355 ti,mbox-num-users = <4>;
356 ti,mbox-num-fifos = <8>;
359 timer1: timer@44e31000 {
360 compatible = "ti,am335x-timer-1ms";
361 reg = <0x44e31000 0x400>;
363 ti,hwmods = "timer1";
367 timer2: timer@48040000 {
368 compatible = "ti,am335x-timer";
369 reg = <0x48040000 0x400>;
371 ti,hwmods = "timer2";
374 timer3: timer@48042000 {
375 compatible = "ti,am335x-timer";
376 reg = <0x48042000 0x400>;
378 ti,hwmods = "timer3";
381 timer4: timer@48044000 {
382 compatible = "ti,am335x-timer";
383 reg = <0x48044000 0x400>;
385 ti,hwmods = "timer4";
389 timer5: timer@48046000 {
390 compatible = "ti,am335x-timer";
391 reg = <0x48046000 0x400>;
393 ti,hwmods = "timer5";
397 timer6: timer@48048000 {
398 compatible = "ti,am335x-timer";
399 reg = <0x48048000 0x400>;
401 ti,hwmods = "timer6";
405 timer7: timer@4804a000 {
406 compatible = "ti,am335x-timer";
407 reg = <0x4804a000 0x400>;
409 ti,hwmods = "timer7";
414 compatible = "ti,da830-rtc";
415 reg = <0x44e3e000 0x1000>;
422 compatible = "ti,omap4-mcspi";
423 #address-cells = <1>;
425 reg = <0x48030000 0x400>;
433 dma-names = "tx0", "rx0", "tx1", "rx1";
438 compatible = "ti,omap4-mcspi";
439 #address-cells = <1>;
441 reg = <0x481a0000 0x400>;
449 dma-names = "tx0", "rx0", "tx1", "rx1";
454 compatible = "ti,am33xx-usb";
455 reg = <0x47400000 0x1000>;
457 #address-cells = <1>;
459 ti,hwmods = "usb_otg_hs";
462 usb_ctrl_mod: control@44e10620 {
463 compatible = "ti,am335x-usb-ctrl-module";
464 reg = <0x44e10620 0x10
466 reg-names = "phy_ctrl", "wakeup";
470 usb0_phy: usb-phy@47401300 {
471 compatible = "ti,am335x-usb-phy";
472 reg = <0x47401300 0x100>;
475 ti,ctrl_mod = <&usb_ctrl_mod>;
479 compatible = "ti,musb-am33xx";
481 reg = <0x47401400 0x400
483 reg-names = "mc", "control";
486 interrupt-names = "mc";
488 mentor,multipoint = <1>;
489 mentor,num-eps = <16>;
490 mentor,ram-bits = <12>;
491 mentor,power = <500>;
494 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
495 &cppi41dma 2 0 &cppi41dma 3 0
496 &cppi41dma 4 0 &cppi41dma 5 0
497 &cppi41dma 6 0 &cppi41dma 7 0
498 &cppi41dma 8 0 &cppi41dma 9 0
499 &cppi41dma 10 0 &cppi41dma 11 0
500 &cppi41dma 12 0 &cppi41dma 13 0
501 &cppi41dma 14 0 &cppi41dma 0 1
502 &cppi41dma 1 1 &cppi41dma 2 1
503 &cppi41dma 3 1 &cppi41dma 4 1
504 &cppi41dma 5 1 &cppi41dma 6 1
505 &cppi41dma 7 1 &cppi41dma 8 1
506 &cppi41dma 9 1 &cppi41dma 10 1
507 &cppi41dma 11 1 &cppi41dma 12 1
508 &cppi41dma 13 1 &cppi41dma 14 1>;
510 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
511 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
513 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
514 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
518 usb1_phy: usb-phy@47401b00 {
519 compatible = "ti,am335x-usb-phy";
520 reg = <0x47401b00 0x100>;
523 ti,ctrl_mod = <&usb_ctrl_mod>;
527 compatible = "ti,musb-am33xx";
529 reg = <0x47401c00 0x400
531 reg-names = "mc", "control";
533 interrupt-names = "mc";
535 mentor,multipoint = <1>;
536 mentor,num-eps = <16>;
537 mentor,ram-bits = <12>;
538 mentor,power = <500>;
541 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
542 &cppi41dma 17 0 &cppi41dma 18 0
543 &cppi41dma 19 0 &cppi41dma 20 0
544 &cppi41dma 21 0 &cppi41dma 22 0
545 &cppi41dma 23 0 &cppi41dma 24 0
546 &cppi41dma 25 0 &cppi41dma 26 0
547 &cppi41dma 27 0 &cppi41dma 28 0
548 &cppi41dma 29 0 &cppi41dma 15 1
549 &cppi41dma 16 1 &cppi41dma 17 1
550 &cppi41dma 18 1 &cppi41dma 19 1
551 &cppi41dma 20 1 &cppi41dma 21 1
552 &cppi41dma 22 1 &cppi41dma 23 1
553 &cppi41dma 24 1 &cppi41dma 25 1
554 &cppi41dma 26 1 &cppi41dma 27 1
555 &cppi41dma 28 1 &cppi41dma 29 1>;
557 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
558 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
560 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
561 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
565 cppi41dma: dma-controller@47402000 {
566 compatible = "ti,am3359-cppi41";
567 reg = <0x47400000 0x1000
571 reg-names = "glue", "controller", "scheduler", "queuemgr";
573 interrupt-names = "glue";
575 #dma-channels = <30>;
576 #dma-requests = <256>;
581 epwmss0: epwmss@48300000 {
582 compatible = "ti,am33xx-pwmss";
583 reg = <0x48300000 0x10>;
584 ti,hwmods = "epwmss0";
585 #address-cells = <1>;
588 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
589 0x48300180 0x48300180 0x80 /* EQEP */
590 0x48300200 0x48300200 0x80>; /* EHRPWM */
592 ecap0: ecap@48300100 {
593 compatible = "ti,am33xx-ecap";
595 reg = <0x48300100 0x80>;
597 interrupt-names = "ecap0";
602 ehrpwm0: ehrpwm@48300200 {
603 compatible = "ti,am33xx-ehrpwm";
605 reg = <0x48300200 0x80>;
606 ti,hwmods = "ehrpwm0";
611 epwmss1: epwmss@48302000 {
612 compatible = "ti,am33xx-pwmss";
613 reg = <0x48302000 0x10>;
614 ti,hwmods = "epwmss1";
615 #address-cells = <1>;
618 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
619 0x48302180 0x48302180 0x80 /* EQEP */
620 0x48302200 0x48302200 0x80>; /* EHRPWM */
622 ecap1: ecap@48302100 {
623 compatible = "ti,am33xx-ecap";
625 reg = <0x48302100 0x80>;
627 interrupt-names = "ecap1";
632 ehrpwm1: ehrpwm@48302200 {
633 compatible = "ti,am33xx-ehrpwm";
635 reg = <0x48302200 0x80>;
636 ti,hwmods = "ehrpwm1";
641 epwmss2: epwmss@48304000 {
642 compatible = "ti,am33xx-pwmss";
643 reg = <0x48304000 0x10>;
644 ti,hwmods = "epwmss2";
645 #address-cells = <1>;
648 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
649 0x48304180 0x48304180 0x80 /* EQEP */
650 0x48304200 0x48304200 0x80>; /* EHRPWM */
652 ecap2: ecap@48304100 {
653 compatible = "ti,am33xx-ecap";
655 reg = <0x48304100 0x80>;
657 interrupt-names = "ecap2";
662 ehrpwm2: ehrpwm@48304200 {
663 compatible = "ti,am33xx-ehrpwm";
665 reg = <0x48304200 0x80>;
666 ti,hwmods = "ehrpwm2";
671 mac: ethernet@4a100000 {
672 compatible = "ti,cpsw";
673 ti,hwmods = "cpgmac0";
674 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
675 clock-names = "fck", "cpts";
676 cpdma_channels = <8>;
677 ale_entries = <1024>;
678 bd_ram_size = <0x2000>;
681 mac_control = <0x20>;
684 cpts_clock_mult = <0x80000000>;
685 cpts_clock_shift = <29>;
686 reg = <0x4a100000 0x800
688 #address-cells = <1>;
690 interrupt-parent = <&intc>;
697 interrupts = <40 41 42 43>;
701 davinci_mdio: mdio@4a101000 {
702 compatible = "ti,davinci_mdio";
703 #address-cells = <1>;
705 ti,hwmods = "davinci_mdio";
706 bus_freq = <1000000>;
707 reg = <0x4a101000 0x100>;
711 cpsw_emac0: slave@4a100200 {
712 /* Filled in by U-Boot */
713 mac-address = [ 00 00 00 00 00 00 ];
716 cpsw_emac1: slave@4a100300 {
717 /* Filled in by U-Boot */
718 mac-address = [ 00 00 00 00 00 00 ];
721 phy_sel: cpsw-phy-sel@44e10650 {
722 compatible = "ti,am3352-cpsw-phy-sel";
723 reg= <0x44e10650 0x4>;
724 reg-names = "gmii-sel";
728 ocmcram: ocmcram@40300000 {
729 compatible = "ti,am3352-ocmcram";
730 reg = <0x40300000 0x10000>;
731 ti,hwmods = "ocmcram";
734 wkup_m3: wkup_m3@44d00000 {
735 compatible = "ti,am3353-wkup-m3";
736 reg = <0x44d00000 0x4000 /* M3 UMEM */
737 0x44d80000 0x2000>; /* M3 DMEM */
738 ti,hwmods = "wkup_m3";
743 compatible = "ti,am3352-elm";
744 reg = <0x48080000 0x2000>;
750 lcdc: lcdc@4830e000 {
751 compatible = "ti,am33xx-tilcdc";
752 reg = <0x4830e000 0x1000>;
753 interrupt-parent = <&intc>;
759 tscadc: tscadc@44e0d000 {
760 compatible = "ti,am3359-tscadc";
761 reg = <0x44e0d000 0x1000>;
762 interrupt-parent = <&intc>;
764 ti,hwmods = "adc_tsc";
768 compatible = "ti,am3359-tsc";
771 #io-channel-cells = <1>;
772 compatible = "ti,am3359-adc";
776 gpmc: gpmc@50000000 {
777 compatible = "ti,am3352-gpmc";
780 reg = <0x50000000 0x2000>;
783 gpmc,num-waitpins = <2>;
784 #address-cells = <2>;
789 sham: sham@53100000 {
790 compatible = "ti,omap4-sham";
792 reg = <0x53100000 0x200>;
799 compatible = "ti,omap4-aes";
801 reg = <0x53500000 0xa0>;
805 dma-names = "tx", "rx";
808 mcasp0: mcasp@48038000 {
809 compatible = "ti,am33xx-mcasp-audio";
810 ti,hwmods = "mcasp0";
811 reg = <0x48038000 0x2000>,
812 <0x46000000 0x400000>;
813 reg-names = "mpu", "dat";
814 interrupts = <80>, <81>;
815 interrupt-names = "tx", "rx";
819 dma-names = "tx", "rx";
822 mcasp1: mcasp@4803C000 {
823 compatible = "ti,am33xx-mcasp-audio";
824 ti,hwmods = "mcasp1";
825 reg = <0x4803C000 0x2000>,
826 <0x46400000 0x400000>;
827 reg-names = "mpu", "dat";
828 interrupts = <82>, <83>;
829 interrupt-names = "tx", "rx";
833 dma-names = "tx", "rx";
837 compatible = "ti,omap4-rng";
839 reg = <0x48310000 0x2000>;
845 /include/ "am33xx-clocks.dtsi"