2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
12 cpu0-supply = <&dcdc2_reg>;
17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */
22 pinctrl-names = "default";
23 pinctrl-0 = <&user_leds_s0>;
25 compatible = "gpio-leds";
28 label = "beaglebone:green:heartbeat";
29 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
30 linux,default-trigger = "heartbeat";
31 default-state = "off";
35 label = "beaglebone:green:mmc0";
36 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
37 linux,default-trigger = "mmc0";
38 default-state = "off";
42 label = "beaglebone:green:usr2";
43 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
44 linux,default-trigger = "cpu0";
45 default-state = "off";
49 label = "beaglebone:green:usr3";
50 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
51 linux,default-trigger = "mmc1";
52 default-state = "off";
56 vmmcsd_fixed: fixedregulator@0 {
57 compatible = "regulator-fixed";
58 regulator-name = "vmmcsd_fixed";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&clkout2_pin>;
68 user_leds_s0: user_leds_s0 {
69 pinctrl-single,pins = <
70 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
71 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
72 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
73 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
77 i2c0_pins: pinmux_i2c0_pins {
78 pinctrl-single,pins = <
79 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
80 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
84 uart0_pins: pinmux_uart0_pins {
85 pinctrl-single,pins = <
86 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
87 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
91 clkout2_pin: pinmux_clkout2_pin {
92 pinctrl-single,pins = <
93 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
97 cpsw_default: cpsw_default {
98 pinctrl-single,pins = <
100 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
101 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
102 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
103 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
104 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
105 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
106 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
107 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
108 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
109 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
110 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
111 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
112 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
116 cpsw_sleep: cpsw_sleep {
117 pinctrl-single,pins = <
118 /* Slave 1 reset value */
119 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
120 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
121 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
122 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
123 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
124 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
125 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
126 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
127 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
128 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
129 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
130 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
131 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
135 davinci_mdio_default: davinci_mdio_default {
136 pinctrl-single,pins = <
138 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
139 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
143 davinci_mdio_sleep: davinci_mdio_sleep {
144 pinctrl-single,pins = <
145 /* MDIO reset value */
146 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
147 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
151 mmc1_pins: pinmux_mmc1_pins {
152 pinctrl-single,pins = <
153 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
157 emmc_pins: pinmux_emmc_pins {
158 pinctrl-single,pins = <
159 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
160 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
161 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
162 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
163 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
164 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
165 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
166 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
167 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
168 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
174 pinctrl-names = "default";
175 pinctrl-0 = <&uart0_pins>;
198 dr_mode = "peripheral";
211 pinctrl-names = "default";
212 pinctrl-0 = <&i2c0_pins>;
215 clock-frequency = <400000>;
223 /include/ "tps65217.dtsi"
227 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
228 * mode") at poweroff. Most BeagleBone versions do not support RTC-only
229 * mode and risk hardware damage if this mode is entered.
231 * For details, see linux-omap mailing list May 2015 thread
232 * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
233 * In particular, messages:
234 * http://www.spinics.net/lists/linux-omap/msg118585.html
235 * http://www.spinics.net/lists/linux-omap/msg118615.html
237 * You can override this later with
238 * &tps { /delete-property/ ti,pmic-shutdown-controller; }
239 * if you want to use RTC-only mode and made sure you are not affected
240 * by the hardware problems. (Tip: double-check by performing a current
241 * measurement after shutdown: it should be less than 1 mA.)
243 ti,pmic-shutdown-controller;
246 dcdc1_reg: regulator@0 {
247 regulator-name = "vdds_dpr";
251 dcdc2_reg: regulator@1 {
252 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
253 regulator-name = "vdd_mpu";
254 regulator-min-microvolt = <925000>;
255 regulator-max-microvolt = <1325000>;
260 dcdc3_reg: regulator@2 {
261 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
262 regulator-name = "vdd_core";
263 regulator-min-microvolt = <925000>;
264 regulator-max-microvolt = <1150000>;
269 ldo1_reg: regulator@3 {
270 regulator-name = "vio,vrtc,vdds";
274 ldo2_reg: regulator@4 {
275 regulator-name = "vdd_3v3aux";
279 ldo3_reg: regulator@5 {
280 regulator-name = "vdd_1v8";
284 ldo4_reg: regulator@6 {
285 regulator-name = "vdd_3v3a";
292 phy_id = <&davinci_mdio>, <0>;
297 phy_id = <&davinci_mdio>, <1>;
302 pinctrl-names = "default", "sleep";
303 pinctrl-0 = <&cpsw_default>;
304 pinctrl-1 = <&cpsw_sleep>;
309 pinctrl-names = "default", "sleep";
310 pinctrl-0 = <&davinci_mdio_default>;
311 pinctrl-1 = <&davinci_mdio_sleep>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&mmc1_pins>;
320 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;