2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux Kernel Configuration"
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_GENERIC_DMA_COHERENT
23 select HAVE_KERNEL_GZIP
24 select HAVE_KERNEL_LZO
25 select HAVE_KERNEL_LZMA
26 select HAVE_PERF_EVENTS
27 select PERF_USE_VMALLOC
28 select HAVE_REGS_AND_STACK_ACCESS_API
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
40 config SYS_SUPPORTS_APM_EMULATION
43 config HAVE_SCHED_CLOCK
49 config ARCH_USES_GETTIMEOFFSET
53 config GENERIC_CLOCKEVENTS
56 config GENERIC_CLOCKEVENTS_BROADCAST
58 depends on GENERIC_CLOCKEVENTS
63 select GENERIC_ALLOCATOR
74 The Extended Industry Standard Architecture (EISA) bus was
75 developed as an open alternative to the IBM MicroChannel bus.
77 The EISA bus provided some of the features of the IBM MicroChannel
78 bus while maintaining backward compatibility with cards made for
79 the older ISA bus. The EISA bus saw limited use between 1988 and
80 1995 when it was made obsolete by the PCI bus.
82 Say Y here if you are building a kernel for an EISA-based machine.
92 MicroChannel Architecture is found in some IBM PS/2 machines and
93 laptops. It is a bus system similar to PCI or ISA. See
94 <file:Documentation/mca.txt> (and especially the web page given
95 there) before attempting to build an MCA bus kernel.
97 config GENERIC_HARDIRQS
101 config STACKTRACE_SUPPORT
105 config HAVE_LATENCYTOP_SUPPORT
110 config LOCKDEP_SUPPORT
114 config TRACE_IRQFLAGS_SUPPORT
118 config HARDIRQS_SW_RESEND
122 config GENERIC_IRQ_PROBE
126 config GENERIC_LOCKBREAK
129 depends on SMP && PREEMPT
131 config RWSEM_GENERIC_SPINLOCK
135 config RWSEM_XCHGADD_ALGORITHM
138 config ARCH_HAS_ILOG2_U32
141 config ARCH_HAS_ILOG2_U64
144 config ARCH_HAS_CPUFREQ
147 Internal node to signify that the ARCH has CPUFREQ support
148 and that the relevant menu configurations are displayed for
151 config GENERIC_HWEIGHT
155 config GENERIC_CALIBRATE_DELAY
159 config ARCH_MAY_HAVE_PC_FDC
165 config NEED_DMA_MAP_STATE
168 config GENERIC_ISA_DMA
177 config GENERIC_HARDIRQS_NO__DO_IRQ
180 config ARM_L1_CACHE_SHIFT_6
183 Setting ARM L1 cache line size to 64 Bytes.
187 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
188 default DRAM_BASE if REMAP_VECTORS_TO_RAM
191 The base address of exception vectors.
193 source "init/Kconfig"
195 source "kernel/Kconfig.freezer"
200 bool "MMU-based Paged Memory Management Support"
203 Select if you want MMU-based virtualised addressing space
204 support by paged memory management. If unsure, say 'Y'.
207 # The "ARM system type" choice list is ordered alphabetically by option
208 # text. Please add new entries in the option alphabetic order.
211 prompt "ARM system type"
212 default ARCH_VERSATILE
215 bool "Agilent AAEC-2000 based"
219 select ARCH_USES_GETTIMEOFFSET
221 This enables support for systems based on the Agilent AAEC-2000
223 config ARCH_INTEGRATOR
224 bool "ARM Ltd. Integrator family"
226 select ARCH_HAS_CPUFREQ
229 select GENERIC_CLOCKEVENTS
230 select PLAT_VERSATILE
232 Support for ARM's Integrator platform.
235 bool "ARM Ltd. RealView family"
239 select GENERIC_CLOCKEVENTS
240 select ARCH_WANT_OPTIONAL_GPIOLIB
241 select PLAT_VERSATILE
242 select ARM_TIMER_SP804
243 select GPIO_PL061 if GPIOLIB
245 This enables support for ARM Ltd RealView boards.
247 config ARCH_VERSATILE
248 bool "ARM Ltd. Versatile family"
253 select GENERIC_CLOCKEVENTS
254 select ARCH_WANT_OPTIONAL_GPIOLIB
255 select PLAT_VERSATILE
256 select ARM_TIMER_SP804
258 This enables support for ARM Ltd Versatile board.
261 bool "ARM Ltd. Versatile Express family"
262 select ARCH_WANT_OPTIONAL_GPIOLIB
264 select ARM_TIMER_SP804
266 select GENERIC_CLOCKEVENTS
269 select PLAT_VERSATILE
271 This enables support for the ARM Ltd Versatile Express boards.
275 select ARCH_REQUIRE_GPIOLIB
278 This enables support for systems based on the Atmel AT91RM9200,
279 AT91SAM9 and AT91CAP9 processors.
282 bool "Broadcom BCMRING"
287 select GENERIC_CLOCKEVENTS
288 select ARCH_WANT_OPTIONAL_GPIOLIB
290 Support for Broadcom's BCMRing platform.
293 bool "Cirrus Logic CLPS711x/EP721x-based"
295 select ARCH_USES_GETTIMEOFFSET
297 Support for Cirrus Logic 711x/721x based boards.
300 bool "Cavium Networks CNS3XXX family"
302 select GENERIC_CLOCKEVENTS
304 select PCI_DOMAINS if PCI
306 Support for Cavium Networks CNS3XXX platform.
309 bool "Cortina Systems Gemini"
311 select ARCH_REQUIRE_GPIOLIB
312 select ARCH_USES_GETTIMEOFFSET
314 Support for the Cortina Systems Gemini family SoCs
321 select ARCH_USES_GETTIMEOFFSET
323 This is an evaluation board for the StrongARM processor available
324 from Digital. It has limited hardware on-board, including an
325 Ethernet interface, two PCMCIA sockets, two serial ports and a
334 select ARCH_REQUIRE_GPIOLIB
335 select ARCH_HAS_HOLES_MEMORYMODEL
336 select ARCH_USES_GETTIMEOFFSET
338 This enables support for the Cirrus EP93xx series of CPUs.
340 config ARCH_FOOTBRIDGE
344 select ARCH_USES_GETTIMEOFFSET
346 Support for systems based on the DC21285 companion chip
347 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
350 bool "Freescale MXC/iMX-based"
351 select GENERIC_CLOCKEVENTS
352 select ARCH_REQUIRE_GPIOLIB
355 Support for Freescale MXC/iMX-based family of processors
358 bool "Freescale STMP3xxx"
361 select ARCH_REQUIRE_GPIOLIB
362 select GENERIC_CLOCKEVENTS
363 select USB_ARCH_HAS_EHCI
365 Support for systems based on the Freescale 3xxx CPUs.
368 bool "Hilscher NetX based"
371 select GENERIC_CLOCKEVENTS
373 This enables support for systems based on the Hilscher NetX Soc
376 bool "Hynix HMS720x-based"
379 select ARCH_USES_GETTIMEOFFSET
381 This enables support for systems based on the Hynix HMS720x
389 select ARCH_SUPPORTS_MSI
392 Support for Intel's IOP13XX (XScale) family of processors.
400 select ARCH_REQUIRE_GPIOLIB
402 Support for Intel's 80219 and IOP32X (XScale) family of
411 select ARCH_REQUIRE_GPIOLIB
413 Support for Intel's IOP33X (XScale) family of processors.
420 select ARCH_USES_GETTIMEOFFSET
422 Support for Intel's IXP23xx (XScale) family of processors.
425 bool "IXP2400/2800-based"
429 select ARCH_USES_GETTIMEOFFSET
431 Support for Intel's IXP2400/2800 (XScale) family of processors.
438 select GENERIC_CLOCKEVENTS
439 select DMABOUNCE if PCI
441 Support for Intel's IXP4XX (XScale) family of processors.
446 select ARCH_REQUIRE_GPIOLIB
447 select GENERIC_CLOCKEVENTS
450 Support for the Marvell Dove SoC 88AP510
453 bool "Marvell Kirkwood"
456 select ARCH_REQUIRE_GPIOLIB
457 select GENERIC_CLOCKEVENTS
460 Support for the following Marvell Kirkwood series SoCs:
461 88F6180, 88F6192 and 88F6281.
464 bool "Marvell Loki (88RC8480)"
466 select GENERIC_CLOCKEVENTS
469 Support for the Marvell Loki (88RC8480) SoC.
474 select ARCH_REQUIRE_GPIOLIB
477 select USB_ARCH_HAS_OHCI
480 select GENERIC_CLOCKEVENTS
482 Support for the NXP LPC32XX family of processors
485 bool "Marvell MV78xx0"
488 select ARCH_REQUIRE_GPIOLIB
489 select GENERIC_CLOCKEVENTS
492 Support for the following Marvell MV78xx0 series SoCs:
500 select ARCH_REQUIRE_GPIOLIB
501 select GENERIC_CLOCKEVENTS
504 Support for the following Marvell Orion 5x series SoCs:
505 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
506 Orion-2 (5281), Orion-1-90 (6183).
509 bool "Marvell PXA168/910/MMP2"
511 select ARCH_REQUIRE_GPIOLIB
513 select GENERIC_CLOCKEVENTS
517 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
520 bool "Micrel/Kendin KS8695"
522 select ARCH_REQUIRE_GPIOLIB
523 select ARCH_USES_GETTIMEOFFSET
525 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
526 System-on-Chip devices.
529 bool "NetSilicon NS9xxx"
532 select GENERIC_CLOCKEVENTS
535 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
538 <http://www.digi.com/products/microprocessors/index.jsp>
541 bool "Nuvoton W90X900 CPU"
543 select ARCH_REQUIRE_GPIOLIB
545 select GENERIC_CLOCKEVENTS
547 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
548 At present, the w90x900 has been renamed nuc900, regarding
549 the ARM series product line, you can login the following
550 link address to know more.
552 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
553 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
556 bool "Nuvoton NUC93X CPU"
560 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
561 low-power and high performance MPEG-4/JPEG multimedia controller chip.
566 select GENERIC_CLOCKEVENTS
570 select ARCH_HAS_BARRIERS if CACHE_L2X0
572 This enables support for NVIDIA Tegra based systems (Tegra APX,
573 Tegra 6xx and Tegra 2 series).
576 bool "Philips Nexperia PNX4008 Mobile"
579 select ARCH_USES_GETTIMEOFFSET
581 This enables support for Philips PNX4008 mobile platform.
584 bool "PXA2xx/PXA3xx-based"
587 select ARCH_HAS_CPUFREQ
589 select ARCH_REQUIRE_GPIOLIB
590 select GENERIC_CLOCKEVENTS
594 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
599 select GENERIC_CLOCKEVENTS
600 select ARCH_REQUIRE_GPIOLIB
602 Support for Qualcomm MSM/QSD based systems. This runs on the
603 apps processor of the MSM/QSD and depends on a shared memory
604 interface to the modem processor which runs the baseband
605 stack and controls some vital subsystems
606 (clock and power control, etc).
609 bool "Renesas SH-Mobile"
611 Support for Renesas's SH-Mobile ARM platforms
618 select ARCH_MAY_HAVE_PC_FDC
619 select HAVE_PATA_PLATFORM
622 select ARCH_SPARSEMEM_ENABLE
623 select ARCH_USES_GETTIMEOFFSET
625 On the Acorn Risc-PC, Linux can support the internal IDE disk and
626 CD-ROM interface, serial and parallel port, and the floppy drive.
632 select ARCH_SPARSEMEM_ENABLE
634 select ARCH_HAS_CPUFREQ
636 select GENERIC_CLOCKEVENTS
639 select ARCH_REQUIRE_GPIOLIB
641 Support for StrongARM 11x0 based boards.
644 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
646 select ARCH_HAS_CPUFREQ
648 select ARCH_USES_GETTIMEOFFSET
649 select HAVE_S3C2410_I2C
651 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
652 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
653 the Samsung SMDK2410 development board (and derivatives).
655 Note, the S3C2416 and the S3C2450 are so close that they even share
656 the same SoC ID code. This means that there is no seperate machine
657 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
660 bool "Samsung S3C64XX"
666 select ARCH_USES_GETTIMEOFFSET
667 select ARCH_HAS_CPUFREQ
668 select ARCH_REQUIRE_GPIOLIB
669 select SAMSUNG_CLKSRC
670 select SAMSUNG_IRQ_VIC_TIMER
671 select SAMSUNG_IRQ_UART
672 select S3C_GPIO_TRACK
673 select S3C_GPIO_PULL_UPDOWN
674 select S3C_GPIO_CFG_S3C24XX
675 select S3C_GPIO_CFG_S3C64XX
677 select USB_ARCH_HAS_OHCI
678 select SAMSUNG_GPIOLIB_4BIT
679 select HAVE_S3C2410_I2C
680 select HAVE_S3C2410_WATCHDOG
682 Samsung S3C64XX series based systems
685 bool "Samsung S5P6440"
689 select HAVE_S3C2410_WATCHDOG
690 select ARCH_USES_GETTIMEOFFSET
691 select HAVE_S3C2410_I2C
694 Samsung S5P6440 CPU based systems
697 bool "Samsung S5P6442"
701 select ARCH_USES_GETTIMEOFFSET
702 select HAVE_S3C2410_WATCHDOG
704 Samsung S5P6442 CPU based systems
707 bool "Samsung S5PC100"
711 select ARM_L1_CACHE_SHIFT_6
712 select ARCH_USES_GETTIMEOFFSET
713 select HAVE_S3C2410_I2C
715 select HAVE_S3C2410_WATCHDOG
717 Samsung S5PC100 series based systems
720 bool "Samsung S5PV210/S5PC110"
724 select ARM_L1_CACHE_SHIFT_6
725 select ARCH_USES_GETTIMEOFFSET
726 select HAVE_S3C2410_I2C
728 select HAVE_S3C2410_WATCHDOG
730 Samsung S5PV210/S5PC110 series based systems
733 bool "Samsung S5PV310/S5PC210"
737 select GENERIC_CLOCKEVENTS
739 Samsung S5PV310 series based systems
748 select ARCH_USES_GETTIMEOFFSET
750 Support for the StrongARM based Digital DNARD machine, also known
751 as "Shark" (<http://www.shark-linux.de/shark.html>).
756 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
757 select ARCH_USES_GETTIMEOFFSET
759 Say Y here for systems based on one of the Sharp LH7A40X
760 System on a Chip processors. These CPUs include an ARM922T
761 core with a wide array of integrated devices for
762 hand-held and low-power applications.
765 bool "ST-Ericsson U300 Series"
771 select GENERIC_CLOCKEVENTS
775 Support for ST-Ericsson U300 series mobile platforms.
778 bool "ST-Ericsson U8500 Series"
781 select GENERIC_CLOCKEVENTS
783 select ARCH_REQUIRE_GPIOLIB
785 Support for ST-Ericsson's Ux500 architecture
788 bool "STMicroelectronics Nomadik"
793 select GENERIC_CLOCKEVENTS
794 select ARCH_REQUIRE_GPIOLIB
796 Support for the Nomadik platform by ST-Ericsson
800 select GENERIC_CLOCKEVENTS
801 select ARCH_REQUIRE_GPIOLIB
805 select GENERIC_ALLOCATOR
806 select ARCH_HAS_HOLES_MEMORYMODEL
808 Support for TI's DaVinci platform.
813 select ARCH_REQUIRE_GPIOLIB
814 select ARCH_HAS_CPUFREQ
815 select GENERIC_CLOCKEVENTS
816 select ARCH_HAS_HOLES_MEMORYMODEL
818 Support for TI's OMAP platform (OMAP1 and OMAP2).
821 bool "Rockchip Soc Rk29"
825 select HAVE_SCHED_CLOCK
826 select ARCH_HAS_CPUFREQ
828 select GENERIC_CLOCKEVENTS
829 select ARCH_REQUIRE_GPIOLIB
834 select ARM_L1_CACHE_SHIFT_6
836 Support for Rockchip RK29 soc.
841 select ARCH_REQUIRE_GPIOLIB
843 select GENERIC_CLOCKEVENTS
846 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
851 # This is sorted alphabetically by mach-* pathname. However, plat-*
852 # Kconfigs may be included either alphabetically (according to the
853 # plat- suffix) or along side the corresponding mach-* source.
855 source "arch/arm/mach-aaec2000/Kconfig"
857 source "arch/arm/mach-at91/Kconfig"
859 source "arch/arm/mach-bcmring/Kconfig"
861 source "arch/arm/mach-clps711x/Kconfig"
863 source "arch/arm/mach-cns3xxx/Kconfig"
865 source "arch/arm/mach-davinci/Kconfig"
867 source "arch/arm/mach-dove/Kconfig"
869 source "arch/arm/mach-ep93xx/Kconfig"
871 source "arch/arm/mach-footbridge/Kconfig"
873 source "arch/arm/mach-gemini/Kconfig"
875 source "arch/arm/mach-h720x/Kconfig"
877 source "arch/arm/mach-integrator/Kconfig"
879 source "arch/arm/mach-iop32x/Kconfig"
881 source "arch/arm/mach-iop33x/Kconfig"
883 source "arch/arm/mach-iop13xx/Kconfig"
885 source "arch/arm/mach-ixp4xx/Kconfig"
887 source "arch/arm/mach-ixp2000/Kconfig"
889 source "arch/arm/mach-ixp23xx/Kconfig"
891 source "arch/arm/mach-kirkwood/Kconfig"
893 source "arch/arm/mach-ks8695/Kconfig"
895 source "arch/arm/mach-lh7a40x/Kconfig"
897 source "arch/arm/mach-loki/Kconfig"
899 source "arch/arm/mach-lpc32xx/Kconfig"
901 source "arch/arm/mach-msm/Kconfig"
903 source "arch/arm/mach-mv78xx0/Kconfig"
905 source "arch/arm/plat-mxc/Kconfig"
907 source "arch/arm/mach-netx/Kconfig"
909 source "arch/arm/mach-nomadik/Kconfig"
910 source "arch/arm/plat-nomadik/Kconfig"
912 source "arch/arm/mach-ns9xxx/Kconfig"
914 source "arch/arm/mach-nuc93x/Kconfig"
916 source "arch/arm/plat-omap/Kconfig"
918 source "arch/arm/mach-omap1/Kconfig"
920 source "arch/arm/mach-omap2/Kconfig"
922 source "arch/arm/mach-orion5x/Kconfig"
924 source "arch/arm/mach-pxa/Kconfig"
925 source "arch/arm/plat-pxa/Kconfig"
927 source "arch/arm/mach-mmp/Kconfig"
929 source "arch/arm/mach-realview/Kconfig"
931 source "arch/arm/mach-rk29/Kconfig"
933 source "arch/arm/mach-sa1100/Kconfig"
935 source "arch/arm/plat-samsung/Kconfig"
936 source "arch/arm/plat-s3c24xx/Kconfig"
937 source "arch/arm/plat-s5p/Kconfig"
939 source "arch/arm/plat-spear/Kconfig"
942 source "arch/arm/mach-s3c2400/Kconfig"
943 source "arch/arm/mach-s3c2410/Kconfig"
944 source "arch/arm/mach-s3c2412/Kconfig"
945 source "arch/arm/mach-s3c2416/Kconfig"
946 source "arch/arm/mach-s3c2440/Kconfig"
947 source "arch/arm/mach-s3c2443/Kconfig"
951 source "arch/arm/mach-s3c64xx/Kconfig"
954 source "arch/arm/mach-s5p6440/Kconfig"
956 source "arch/arm/mach-s5p6442/Kconfig"
958 source "arch/arm/mach-s5pc100/Kconfig"
960 source "arch/arm/mach-s5pv210/Kconfig"
962 source "arch/arm/mach-s5pv310/Kconfig"
964 source "arch/arm/mach-shmobile/Kconfig"
966 source "arch/arm/plat-stmp3xxx/Kconfig"
968 source "arch/arm/mach-tegra/Kconfig"
970 source "arch/arm/mach-u300/Kconfig"
972 source "arch/arm/mach-ux500/Kconfig"
974 source "arch/arm/mach-versatile/Kconfig"
976 source "arch/arm/mach-vexpress/Kconfig"
978 source "arch/arm/mach-w90x900/Kconfig"
980 # Definitions to make life easier
986 select GENERIC_CLOCKEVENTS
994 config PLAT_VERSATILE
997 config ARM_TIMER_SP804
1000 source arch/arm/mm/Kconfig
1003 bool "Enable iWMMXt support"
1004 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1005 default y if PXA27x || PXA3xx || ARCH_MMP
1007 Enable support for iWMMXt context switching at run time if
1008 running on a CPU that supports it.
1010 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1013 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1017 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1018 (!ARCH_OMAP3 || OMAP3_EMU)
1023 source "arch/arm/Kconfig-nommu"
1026 config ARM_ERRATA_411920
1027 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1028 depends on CPU_V6 && !SMP
1030 Invalidation of the Instruction Cache operation can
1031 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1032 It does not affect the MPCore. This option enables the ARM Ltd.
1033 recommended workaround.
1035 config ARM_ERRATA_430973
1036 bool "ARM errata: Stale prediction on replaced interworking branch"
1039 This option enables the workaround for the 430973 Cortex-A8
1040 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1041 interworking branch is replaced with another code sequence at the
1042 same virtual address, whether due to self-modifying code or virtual
1043 to physical address re-mapping, Cortex-A8 does not recover from the
1044 stale interworking branch prediction. This results in Cortex-A8
1045 executing the new code sequence in the incorrect ARM or Thumb state.
1046 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1047 and also flushes the branch target cache at every context switch.
1048 Note that setting specific bits in the ACTLR register may not be
1049 available in non-secure mode.
1051 config ARM_ERRATA_458693
1052 bool "ARM errata: Processor deadlock when a false hazard is created"
1055 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1056 erratum. For very specific sequences of memory operations, it is
1057 possible for a hazard condition intended for a cache line to instead
1058 be incorrectly associated with a different cache line. This false
1059 hazard might then cause a processor deadlock. The workaround enables
1060 the L1 caching of the NEON accesses and disables the PLD instruction
1061 in the ACTLR register. Note that setting specific bits in the ACTLR
1062 register may not be available in non-secure mode.
1064 config ARM_ERRATA_460075
1065 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1068 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1069 erratum. Any asynchronous access to the L2 cache may encounter a
1070 situation in which recent store transactions to the L2 cache are lost
1071 and overwritten with stale memory contents from external memory. The
1072 workaround disables the write-allocate mode for the L2 cache via the
1073 ACTLR register. Note that setting specific bits in the ACTLR register
1074 may not be available in non-secure mode.
1076 config ARM_ERRATA_742230
1077 bool "ARM errata: DMB operation may be faulty"
1078 depends on CPU_V7 && SMP
1080 This option enables the workaround for the 742230 Cortex-A9
1081 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1082 between two write operations may not ensure the correct visibility
1083 ordering of the two writes. This workaround sets a specific bit in
1084 the diagnostic register of the Cortex-A9 which causes the DMB
1085 instruction to behave as a DSB, ensuring the correct behaviour of
1088 config ARM_ERRATA_742231
1089 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1090 depends on CPU_V7 && SMP
1092 This option enables the workaround for the 742231 Cortex-A9
1093 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1094 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1095 accessing some data located in the same cache line, may get corrupted
1096 data due to bad handling of the address hazard when the line gets
1097 replaced from one of the CPUs at the same time as another CPU is
1098 accessing it. This workaround sets specific bits in the diagnostic
1099 register of the Cortex-A9 which reduces the linefill issuing
1100 capabilities of the processor.
1102 config PL310_ERRATA_588369
1103 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1104 depends on CACHE_L2X0 && ARCH_OMAP4
1106 The PL310 L2 cache controller implements three types of Clean &
1107 Invalidate maintenance operations: by Physical Address
1108 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1109 They are architecturally defined to behave as the execution of a
1110 clean operation followed immediately by an invalidate operation,
1111 both performing to the same memory location. This functionality
1112 is not correctly implemented in PL310 as clean lines are not
1113 invalidated as a result of these operations. Note that this errata
1114 uses Texas Instrument's secure monitor api.
1116 config ARM_ERRATA_720789
1117 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1118 depends on CPU_V7 && SMP
1120 This option enables the workaround for the 720789 Cortex-A9 (prior to
1121 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1122 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1123 As a consequence of this erratum, some TLB entries which should be
1124 invalidated are not, resulting in an incoherency in the system page
1125 tables. The workaround changes the TLB flushing routines to invalidate
1126 entries regardless of the ASID.
1128 config ARM_ERRATA_743622
1129 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1132 This option enables the workaround for the 743622 Cortex-A9
1133 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1134 optimisation in the Cortex-A9 Store Buffer may lead to data
1135 corruption. This workaround sets a specific bit in the diagnostic
1136 register of the Cortex-A9 which disables the Store Buffer
1137 optimisation, preventing the defect from occurring. This has no
1138 visible impact on the overall performance or power consumption of the
1143 source "arch/arm/common/Kconfig"
1153 Find out whether you have ISA slots on your motherboard. ISA is the
1154 name of a bus system, i.e. the way the CPU talks to the other stuff
1155 inside your box. Other bus systems are PCI, EISA, MicroChannel
1156 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1157 newer boards don't support it. If you have ISA, say Y, otherwise N.
1159 # Select ISA DMA controller support
1164 # Select ISA DMA interface
1169 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1171 Find out whether you have a PCI motherboard. PCI is the name of a
1172 bus system, i.e. the way the CPU talks to the other stuff inside
1173 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1174 VESA. If you have PCI, say Y, otherwise N.
1183 # Select the host bridge type
1184 config PCI_HOST_VIA82C505
1186 depends on PCI && ARCH_SHARK
1189 config PCI_HOST_ITE8152
1191 depends on PCI && MACH_ARMCORE
1195 source "drivers/pci/Kconfig"
1197 source "drivers/pcmcia/Kconfig"
1201 menu "Kernel Features"
1203 source "kernel/time/Kconfig"
1206 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1207 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
1208 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1209 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1210 depends on GENERIC_CLOCKEVENTS
1211 select USE_GENERIC_SMP_HELPERS
1212 select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\
1213 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1215 This enables support for systems with more than one CPU. If you have
1216 a system with only one CPU, like most personal computers, say N. If
1217 you have a system with more than one CPU, say Y.
1219 If you say N here, the kernel will run on single and multiprocessor
1220 machines, but will use only one CPU of a multiprocessor machine. If
1221 you say Y here, the kernel will run on many, but not all, single
1222 processor machines. On a single processor machine, the kernel will
1223 run faster if you say N here.
1225 See also <file:Documentation/i386/IO-APIC.txt>,
1226 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1227 <http://www.linuxdoc.org/docs.html#howto>.
1229 If you don't know what to do here, say N.
1235 This option enables support for the ARM system coherency unit
1241 This options enables support for the ARM timer and watchdog unit
1244 prompt "Memory split"
1247 Select the desired split between kernel and user memory.
1249 If you are not absolutely sure what you are doing, leave this
1253 bool "3G/1G user/kernel split"
1255 bool "2G/2G user/kernel split"
1257 bool "1G/3G user/kernel split"
1262 default 0x40000000 if VMSPLIT_1G
1263 default 0x80000000 if VMSPLIT_2G
1267 int "Maximum number of CPUs (2-32)"
1273 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1274 depends on SMP && HOTPLUG && EXPERIMENTAL
1276 Say Y here to experiment with turning CPUs off and on. CPUs
1277 can be controlled through /sys/devices/system/cpu.
1280 bool "Use local timer interrupts"
1281 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
1282 REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1283 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1285 select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \
1286 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS
1288 Enable support for local timers on SMP platforms, rather then the
1289 legacy IPI broadcast method. Local timers allows the system
1290 accounting to be spread across the timer interval, preventing a
1291 "thundering herd" at every timer tick.
1293 source kernel/Kconfig.preempt
1297 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
1298 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1299 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1300 default AT91_TIMER_HZ if ARCH_AT91
1301 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1304 config THUMB2_KERNEL
1305 bool "Compile the kernel in Thumb-2 mode"
1306 depends on CPU_V7 && EXPERIMENTAL
1308 select ARM_ASM_UNIFIED
1310 By enabling this option, the kernel will be compiled in
1311 Thumb-2 mode. A compiler/assembler that understand the unified
1312 ARM-Thumb syntax is needed.
1316 config ARM_ASM_UNIFIED
1320 bool "Use the ARM EABI to compile the kernel"
1322 This option allows for the kernel to be compiled using the latest
1323 ARM ABI (aka EABI). This is only useful if you are using a user
1324 space environment that is also compiled with EABI.
1326 Since there are major incompatibilities between the legacy ABI and
1327 EABI, especially with regard to structure member alignment, this
1328 option also changes the kernel syscall calling convention to
1329 disambiguate both ABIs and allow for backward compatibility support
1330 (selected with CONFIG_OABI_COMPAT).
1332 To use this you need GCC version 4.0.0 or later.
1335 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1336 depends on AEABI && EXPERIMENTAL
1339 This option preserves the old syscall interface along with the
1340 new (ARM EABI) one. It also provides a compatibility layer to
1341 intercept syscalls that have structure arguments which layout
1342 in memory differs between the legacy ABI and the new ARM EABI
1343 (only for non "thumb" binaries). This option adds a tiny
1344 overhead to all syscalls and produces a slightly larger kernel.
1345 If you know you'll be using only pure EABI user space then you
1346 can say N here. If this option is not selected and you attempt
1347 to execute a legacy ABI binary then the result will be
1348 UNPREDICTABLE (in fact it can be predicted that it won't work
1349 at all). If in doubt say Y.
1351 config ARCH_HAS_HOLES_MEMORYMODEL
1354 config ARCH_SPARSEMEM_ENABLE
1357 config ARCH_SPARSEMEM_DEFAULT
1358 def_bool ARCH_SPARSEMEM_ENABLE
1360 config ARCH_SELECT_MEMORY_MODEL
1361 def_bool ARCH_SPARSEMEM_ENABLE
1364 bool "High Memory Support (EXPERIMENTAL)"
1365 depends on MMU && EXPERIMENTAL
1367 The address space of ARM processors is only 4 Gigabytes large
1368 and it has to accommodate user address space, kernel address
1369 space as well as some memory mapped IO. That means that, if you
1370 have a large amount of physical memory and/or IO, not all of the
1371 memory can be "permanently mapped" by the kernel. The physical
1372 memory that is not permanently mapped is called "high memory".
1374 Depending on the selected kernel/user memory split, minimum
1375 vmalloc space and actual amount of RAM, you may not need this
1376 option which should result in a slightly faster kernel.
1381 bool "Allocate 2nd-level pagetables from highmem"
1383 depends on !OUTER_CACHE
1385 config HW_PERF_EVENTS
1386 bool "Enable hardware performance counter support for perf events"
1387 depends on PERF_EVENTS && CPU_HAS_PMU
1390 Enable hardware performance counter support for perf events. If
1391 disabled, perf events will use software events only.
1396 This enables support for sparse irqs. This is useful in general
1397 as most CPUs have a fairly sparse array of IRQ vectors, which
1398 the irq_desc then maps directly on to. Systems with a high
1399 number of off-chip IRQs will want to treat this as
1400 experimental until they have been independently verified.
1404 config FORCE_MAX_ZONEORDER
1405 int "Maximum zone order" if ARCH_SHMOBILE
1406 range 11 64 if ARCH_SHMOBILE
1407 default "9" if SA1111
1410 The kernel memory allocator divides physically contiguous memory
1411 blocks into "zones", where each zone is a power of two number of
1412 pages. This option selects the largest power of two that the kernel
1413 keeps in the memory allocator. If you need to allocate very large
1414 blocks of physically contiguous memory, then you may need to
1415 increase this value.
1417 This config option is actually maximum order plus one. For example,
1418 a value of 11 means that the largest free memory block is 2^10 pages.
1421 bool "Timer and CPU usage LEDs"
1422 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1423 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1424 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1425 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1426 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1427 ARCH_AT91 || ARCH_DAVINCI || \
1428 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1430 If you say Y here, the LEDs on your machine will be used
1431 to provide useful information about your current system status.
1433 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1434 be able to select which LEDs are active using the options below. If
1435 you are compiling a kernel for the EBSA-110 or the LART however, the
1436 red LED will simply flash regularly to indicate that the system is
1437 still functional. It is safe to say Y here if you have a CATS
1438 system, but the driver will do nothing.
1441 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1442 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1443 || MACH_OMAP_PERSEUS2
1445 depends on !GENERIC_CLOCKEVENTS
1446 default y if ARCH_EBSA110
1448 If you say Y here, one of the system LEDs (the green one on the
1449 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1450 will flash regularly to indicate that the system is still
1451 operational. This is mainly useful to kernel hackers who are
1452 debugging unstable kernels.
1454 The LART uses the same LED for both Timer LED and CPU usage LED
1455 functions. You may choose to use both, but the Timer LED function
1456 will overrule the CPU usage LED.
1459 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1461 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1462 || MACH_OMAP_PERSEUS2
1465 If you say Y here, the red LED will be used to give a good real
1466 time indication of CPU usage, by lighting whenever the idle task
1467 is not currently executing.
1469 The LART uses the same LED for both Timer LED and CPU usage LED
1470 functions. You may choose to use both, but the Timer LED function
1471 will overrule the CPU usage LED.
1473 config ALIGNMENT_TRAP
1475 depends on CPU_CP15_MMU
1476 default y if !ARCH_EBSA110
1477 select HAVE_PROC_CPU if PROC_FS
1479 ARM processors cannot fetch/store information which is not
1480 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1481 address divisible by 4. On 32-bit ARM processors, these non-aligned
1482 fetch/store instructions will be emulated in software if you say
1483 here, which has a severe performance impact. This is necessary for
1484 correct operation of some network protocols. With an IP-only
1485 configuration it is safe to say N, otherwise say Y.
1487 config UACCESS_WITH_MEMCPY
1488 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1489 depends on MMU && EXPERIMENTAL
1490 default y if CPU_FEROCEON
1492 Implement faster copy_to_user and clear_user methods for CPU
1493 cores where a 8-word STM instruction give significantly higher
1494 memory write throughput than a sequence of individual 32bit stores.
1496 A possible side effect is a slight increase in scheduling latency
1497 between threads sharing the same address space if they invoke
1498 such copy operations with large buffers.
1500 However, if the CPU data cache is using a write-allocate mode,
1501 this option is unlikely to provide any performance gain.
1503 config CC_STACKPROTECTOR
1504 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1506 This option turns on the -fstack-protector GCC feature. This
1507 feature puts, at the beginning of functions, a canary value on
1508 the stack just before the return address, and validates
1509 the value just before actually returning. Stack based buffer
1510 overflows (that need to overwrite this return address) now also
1511 overwrite the canary, which gets detected and the attack is then
1512 neutralized via a kernel panic.
1513 This feature requires gcc version 4.2 or above.
1515 config DEPRECATED_PARAM_STRUCT
1516 bool "Provide old way to pass kernel parameters"
1518 This was deprecated in 2001 and announced to live on for 5 years.
1519 Some old boot loaders still use this way.
1525 # Compressed boot loader in ROM. Yes, we really want to ask about
1526 # TEXT and BSS so we preserve their values in the config files.
1527 config ZBOOT_ROM_TEXT
1528 hex "Compressed ROM boot loader base address"
1531 The physical address at which the ROM-able zImage is to be
1532 placed in the target. Platforms which normally make use of
1533 ROM-able zImage formats normally set this to a suitable
1534 value in their defconfig file.
1536 If ZBOOT_ROM is not enabled, this has no effect.
1538 config ZBOOT_ROM_BSS
1539 hex "Compressed ROM boot loader BSS address"
1542 The base address of an area of read/write memory in the target
1543 for the ROM-able zImage which must be available while the
1544 decompressor is running. It must be large enough to hold the
1545 entire decompressed kernel plus an additional 128 KiB.
1546 Platforms which normally make use of ROM-able zImage formats
1547 normally set this to a suitable value in their defconfig file.
1549 If ZBOOT_ROM is not enabled, this has no effect.
1552 bool "Compressed boot loader in ROM/flash"
1553 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1555 Say Y here if you intend to execute your compressed kernel image
1556 (zImage) directly from ROM or flash. If unsure, say N.
1559 string "Default kernel command string"
1562 On some architectures (EBSA110 and CATS), there is currently no way
1563 for the boot loader to pass arguments to the kernel. For these
1564 architectures, you should supply some command-line options at build
1565 time by entering them here. As a minimum, you should specify the
1566 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1568 config CMDLINE_FORCE
1569 bool "Always use the default kernel command string"
1570 depends on CMDLINE != ""
1572 Always use the default kernel command string, even if the boot
1573 loader passes other arguments to the kernel.
1574 This is useful if you cannot or don't want to change the
1575 command-line options your boot loader passes to the kernel.
1580 bool "Kernel Execute-In-Place from ROM"
1581 depends on !ZBOOT_ROM
1583 Execute-In-Place allows the kernel to run from non-volatile storage
1584 directly addressable by the CPU, such as NOR flash. This saves RAM
1585 space since the text section of the kernel is not loaded from flash
1586 to RAM. Read-write sections, such as the data section and stack,
1587 are still copied to RAM. The XIP kernel is not compressed since
1588 it has to run directly from flash, so it will take more space to
1589 store it. The flash address used to link the kernel object files,
1590 and for storing it, is configuration dependent. Therefore, if you
1591 say Y here, you must know the proper physical address where to
1592 store the kernel image depending on your own flash memory usage.
1594 Also note that the make target becomes "make xipImage" rather than
1595 "make zImage" or "make Image". The final kernel binary to put in
1596 ROM memory will be arch/arm/boot/xipImage.
1600 config XIP_PHYS_ADDR
1601 hex "XIP Kernel Physical Location"
1602 depends on XIP_KERNEL
1603 default "0x00080000"
1605 This is the physical address in your flash memory the kernel will
1606 be linked for and stored to. This address is dependent on your
1610 bool "Kexec system call (EXPERIMENTAL)"
1611 depends on EXPERIMENTAL
1613 kexec is a system call that implements the ability to shutdown your
1614 current kernel, and to start another kernel. It is like a reboot
1615 but it is independent of the system firmware. And like a reboot
1616 you can start any kernel with it, not just Linux.
1618 It is an ongoing process to be certain the hardware in a machine
1619 is properly shutdown, so do not be surprised if this code does not
1620 initially work for you. It may help to enable device hotplugging
1624 bool "Export atags in procfs"
1628 Should the atags used to boot the kernel be exported in an "atags"
1629 file in procfs. Useful with kexec.
1631 config AUTO_ZRELADDR
1632 bool "Auto calculation of the decompressed kernel image address"
1633 depends on !ZBOOT_ROM && !ARCH_U300
1635 ZRELADDR is the physical address where the decompressed kernel
1636 image will be placed. If AUTO_ZRELADDR is selected, the address
1637 will be determined at run-time by masking the current IP with
1638 0xf8000000. This assumes the zImage being placed in the first 128MB
1639 from start of memory.
1643 menu "CPU Power Management"
1647 source "drivers/cpufreq/Kconfig"
1649 config CPU_FREQ_SA1100
1652 config CPU_FREQ_SA1110
1655 config CPU_FREQ_INTEGRATOR
1656 tristate "CPUfreq driver for ARM Integrator CPUs"
1657 depends on ARCH_INTEGRATOR && CPU_FREQ
1660 This enables the CPUfreq driver for ARM Integrator CPUs.
1662 For details, take a look at <file:Documentation/cpu-freq>.
1668 depends on CPU_FREQ && ARCH_PXA && PXA25x
1670 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1672 config CPU_FREQ_S3C64XX
1673 bool "CPUfreq support for Samsung S3C64XX CPUs"
1674 depends on CPU_FREQ && CPU_S3C6410
1679 Internal configuration node for common cpufreq on Samsung SoC
1681 config CPU_FREQ_S3C24XX
1682 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1683 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1686 This enables the CPUfreq driver for the Samsung S3C24XX family
1689 For details, take a look at <file:Documentation/cpu-freq>.
1693 config CPU_FREQ_S3C24XX_PLL
1694 bool "Support CPUfreq changing of PLL frequency"
1695 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1697 Compile in support for changing the PLL frequency from the
1698 S3C24XX series CPUfreq driver. The PLL takes time to settle
1699 after a frequency change, so by default it is not enabled.
1701 This also means that the PLL tables for the selected CPU(s) will
1702 be built which may increase the size of the kernel image.
1704 config CPU_FREQ_S3C24XX_DEBUG
1705 bool "Debug CPUfreq Samsung driver core"
1706 depends on CPU_FREQ_S3C24XX
1708 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1710 config CPU_FREQ_S3C24XX_IODEBUG
1711 bool "Debug CPUfreq Samsung driver IO timing"
1712 depends on CPU_FREQ_S3C24XX
1714 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1716 config CPU_FREQ_S3C24XX_DEBUGFS
1717 bool "Export debugfs for CPUFreq"
1718 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1720 Export status information via debugfs.
1724 source "drivers/cpuidle/Kconfig"
1728 menu "Floating point emulation"
1730 comment "At least one emulation must be selected"
1733 bool "NWFPE math emulation"
1734 depends on !AEABI || OABI_COMPAT
1736 Say Y to include the NWFPE floating point emulator in the kernel.
1737 This is necessary to run most binaries. Linux does not currently
1738 support floating point hardware so you need to say Y here even if
1739 your machine has an FPA or floating point co-processor podule.
1741 You may say N here if you are going to load the Acorn FPEmulator
1742 early in the bootup.
1745 bool "Support extended precision"
1746 depends on FPE_NWFPE
1748 Say Y to include 80-bit support in the kernel floating-point
1749 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1750 Note that gcc does not generate 80-bit operations by default,
1751 so in most cases this option only enlarges the size of the
1752 floating point emulator without any good reason.
1754 You almost surely want to say N here.
1757 bool "FastFPE math emulation (EXPERIMENTAL)"
1758 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1760 Say Y here to include the FAST floating point emulator in the kernel.
1761 This is an experimental much faster emulator which now also has full
1762 precision for the mantissa. It does not support any exceptions.
1763 It is very simple, and approximately 3-6 times faster than NWFPE.
1765 It should be sufficient for most programs. It may be not suitable
1766 for scientific calculations, but you have to check this for yourself.
1767 If you do not feel you need a faster FP emulation you should better
1771 bool "VFP-format floating point maths"
1772 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1774 Say Y to include VFP support code in the kernel. This is needed
1775 if your hardware includes a VFP unit.
1777 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1778 release notes and additional status information.
1780 Say N if your target does not have VFP hardware.
1788 bool "Advanced SIMD (NEON) Extension support"
1789 depends on VFPv3 && CPU_V7
1791 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1796 menu "Userspace binary formats"
1798 source "fs/Kconfig.binfmt"
1801 tristate "RISC OS personality"
1804 Say Y here to include the kernel code necessary if you want to run
1805 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1806 experimental; if this sounds frightening, say N and sleep in peace.
1807 You can also say M here to compile this support as a module (which
1808 will be called arthur).
1812 menu "Power management options"
1814 source "kernel/power/Kconfig"
1816 config ARCH_SUSPEND_POSSIBLE
1821 source "net/Kconfig"
1823 source "drivers/Kconfig"
1827 source "arch/arm/Kconfig.debug"
1829 source "security/Kconfig"
1831 source "crypto/Kconfig"
1833 source "lib/Kconfig"