2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #ifndef _ASM_ARC_ATOMIC_H
10 #define _ASM_ARC_ATOMIC_H
16 #include <linux/types.h>
17 #include <linux/compiler.h>
18 #include <asm/cmpxchg.h>
19 #include <asm/barrier.h>
22 #define atomic_read(v) ((v)->counter)
24 #ifdef CONFIG_ARC_HAS_LLSC
26 #define atomic_set(v, i) (((v)->counter) = (i))
28 static inline void atomic_add(int i, atomic_t *v)
33 "1: llock %0, [%1] \n"
37 : "=&r"(temp) /* Early clobber, to prevent reg reuse */
38 : "r"(&v->counter), "ir"(i)
42 static inline void atomic_sub(int i, atomic_t *v)
47 "1: llock %0, [%1] \n"
52 : "r"(&v->counter), "ir"(i)
56 /* add and also return the new value */
57 static inline int atomic_add_return(int i, atomic_t *v)
62 "1: llock %0, [%1] \n"
67 : "r"(&v->counter), "ir"(i)
73 static inline int atomic_sub_return(int i, atomic_t *v)
78 "1: llock %0, [%1] \n"
83 : "r"(&v->counter), "ir"(i)
89 static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
94 "1: llock %0, [%1] \n"
99 : "r"(addr), "ir"(mask)
103 #else /* !CONFIG_ARC_HAS_LLSC */
107 /* violating atomic_xxx API locking protocol in UP for optimization sake */
108 #define atomic_set(v, i) (((v)->counter) = (i))
112 static inline void atomic_set(atomic_t *v, int i)
115 * Independent of hardware support, all of the atomic_xxx() APIs need
116 * to follow the same locking rules to make sure that a "hardware"
117 * atomic insn (e.g. LD) doesn't clobber an "emulated" atomic insn
120 * Thus atomic_set() despite being 1 insn (and seemingly atomic)
121 * requires the locking.
125 atomic_ops_lock(flags);
127 atomic_ops_unlock(flags);
132 * Non hardware assisted Atomic-R-M-W
133 * Locking would change to irq-disabling only (UP) and spinlocks (SMP)
136 static inline void atomic_add(int i, atomic_t *v)
140 atomic_ops_lock(flags);
142 atomic_ops_unlock(flags);
145 static inline void atomic_sub(int i, atomic_t *v)
149 atomic_ops_lock(flags);
151 atomic_ops_unlock(flags);
154 static inline int atomic_add_return(int i, atomic_t *v)
159 atomic_ops_lock(flags);
163 atomic_ops_unlock(flags);
168 static inline int atomic_sub_return(int i, atomic_t *v)
173 atomic_ops_lock(flags);
177 atomic_ops_unlock(flags);
182 static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
186 atomic_ops_lock(flags);
188 atomic_ops_unlock(flags);
191 #endif /* !CONFIG_ARC_HAS_LLSC */
194 * __atomic_add_unless - add unless the number is a given value
195 * @v: pointer of type atomic_t
196 * @a: the amount to add to v...
197 * @u: ...unless v is equal to u.
199 * Atomically adds @a to @v, so long as it was not @u.
200 * Returns the old value of @v
202 #define __atomic_add_unless(v, a, u) \
205 c = atomic_read(v); \
206 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c)\
211 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
213 #define atomic_inc(v) atomic_add(1, v)
214 #define atomic_dec(v) atomic_sub(1, v)
216 #define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
217 #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
218 #define atomic_inc_return(v) atomic_add_return(1, (v))
219 #define atomic_dec_return(v) atomic_sub_return(1, (v))
220 #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
222 #define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
224 #define ATOMIC_INIT(i) { (i) }
226 #include <asm-generic/atomic64.h>