arch/arc/boot/dts/abilis_tb10x.dtsi

   1 /*
   2  * Abilis Systems TB10X SOC device tree
   3  *
   4  * Copyright (C) Abilis Systems 2013
   5  *
   6  * Author: Christian Ruppert <christian.ruppert@abilis.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  */
  21
  22 /* interrupt specifiers
  23  * --------------------
  24  * 0: rising, 1: low, 2: high, 3: falling,
  25  */
  26
  27 / {
  28         compatible              = "abilis,arc-tb10x";
  29         #address-cells          = <1>;
  30         #size-cells             = <1>;
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35                 cpu@0 {
  36                         device_type = "cpu";
  37                         compatible = "snps,arc770d";
  38                         reg = <0>;
  39                 };
  40         };
  41
  42         soc100 {
  43                 #address-cells  = <1>;
  44                 #size-cells     = <1>;
  45                 device_type     = "soc";
  46                 ranges          = <0xfe000000 0xfe000000 0x02000000
  47                                 0x000F0000 0x000F0000 0x00010000>;
  48                 compatible      = "abilis,tb10x", "simple-bus";
  49
  50                 pll0: oscillator {
  51                         compatible = "fixed-clock";
  52                         #clock-cells = <0>;
  53                         clock-output-names = "pll0";
  54                 };
  55                 cpu_clk: clkdiv_cpu {
  56                         compatible = "fixed-factor-clock";
  57                         #clock-cells = <0>;
  58                         clocks = <&pll0>;
  59                         clock-output-names = "cpu_clk";
  60                 };
  61                 ahb_clk: clkdiv_ahb {
  62                         compatible = "fixed-factor-clock";
  63                         #clock-cells = <0>;
  64                         clocks = <&pll0>;
  65                         clock-output-names = "ahb_clk";
  66                 };
  67
  68                 iomux: iomux@FF10601c {
  69                         #address-cells = <1>;
  70                         #size-cells = <1>;
  71                         compatible = "abilis,tb10x-iomux";
  72                         reg = <0xFF10601c 0x4>;
  73                 };
  74
  75                 intc: interrupt-controller {
  76                         compatible = "snps,arc700-intc";
  77                         interrupt-controller;
  78                         #interrupt-cells = <1>;
  79                 };
  80                 tb10x_ictl: pic@fe002000 {
  81                         compatible = "abilis,tb10x_ictl";
  82                         reg = <0xFE002000 0x20>;
  83                         interrupt-controller;
  84                         #interrupt-cells = <2>;
  85                         interrupt-parent = <&intc>;
  86                         interrupts = <5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
  87                                         20 21 22 23 24 25 26 27 28 29 30 31>;
  88                 };
  89
  90                 uart@FF100000 {
  91                         compatible = "snps,dw-apb-uart";
  92                         reg = <0xFF100000 0x100>;
  93                         clock-frequency = <166666666>;
  94                         interrupts = <25 1>;
  95                         reg-shift = <2>;
  96                         reg-io-width = <4>;
  97                         interrupt-parent = <&tb10x_ictl>;
  98                 };
  99                 ethernet@FE100000 {
 100                         compatible = "snps,dwmac-3.70a","snps,dwmac";
 101                         reg = <0xFE100000 0x1058>;
 102                         interrupt-parent = <&tb10x_ictl>;
 103                         interrupts = <6 1>;
 104                         interrupt-names = "macirq";
 105                         clocks = <&ahb_clk>;
 106                         clock-names = "stmmaceth";
 107                 };
 108                 dma@FE000000 {
 109                         compatible = "snps,dma-spear1340";
 110                         reg = <0xFE000000 0x400>;
 111                         interrupt-parent = <&tb10x_ictl>;
 112                         interrupts = <14 1>;
 113                         dma-channels = <6>;
 114                         dma-requests = <0>;
 115                         dma-masters = <1>;
 116                         #dma-cells = <3>;
 117                         chan_allocation_order = <0>;
 118                         chan_priority = <1>;
 119                         block_size = <0x7ff>;
 120                         data_width = <2 0 0 0>;
 121                         clocks = <&ahb_clk>;
 122                         clock-names = "hclk";
 123                 };
 124
 125                 i2c0: i2c@FF120000 {
 126                         #address-cells = <1>;
 127                         #size-cells = <0>;
 128                         compatible = "snps,designware-i2c";
 129                         reg = <0xFF120000 0x1000>;
 130                         interrupt-parent = <&tb10x_ictl>;
 131                         interrupts = <12 1>;
 132                         clocks = <&ahb_clk>;
 133                 };
 134                 i2c1: i2c@FF121000 {
 135                         #address-cells = <1>;
 136                         #size-cells = <0>;
 137                         compatible = "snps,designware-i2c";
 138                         reg = <0xFF121000 0x1000>;
 139                         interrupt-parent = <&tb10x_ictl>;
 140                         interrupts = <12 1>;
 141                         clocks = <&ahb_clk>;
 142                 };
 143                 i2c2: i2c@FF122000 {
 144                         #address-cells = <1>;
 145                         #size-cells = <0>;
 146                         compatible = "snps,designware-i2c";
 147                         reg = <0xFF122000 0x1000>;
 148                         interrupt-parent = <&tb10x_ictl>;
 149                         interrupts = <12 1>;
 150                         clocks = <&ahb_clk>;
 151                 };
 152                 i2c3: i2c@FF123000 {
 153                         #address-cells = <1>;
 154                         #size-cells = <0>;
 155                         compatible = "snps,designware-i2c";
 156                         reg = <0xFF123000 0x1000>;
 157                         interrupt-parent = <&tb10x_ictl>;
 158                         interrupts = <12 1>;
 159                         clocks = <&ahb_clk>;
 160                 };
 161                 i2c4: i2c@FF124000 {
 162                         #address-cells = <1>;
 163                         #size-cells = <0>;
 164                         compatible = "snps,designware-i2c";
 165                         reg = <0xFF124000 0x1000>;
 166                         interrupt-parent = <&tb10x_ictl>;
 167                         interrupts = <12 1>;
 168                         clocks = <&ahb_clk>;
 169                 };
 170
 171                 spi0: spi@0xFE010000 {
 172                         #address-cells = <1>;
 173                         #size-cells = <0>;
 174                         cell-index = <0>;
 175                         compatible = "abilis,tb100-spi";
 176                         num-cs = <1>;
 177                         reg = <0xFE010000 0x20>;
 178                         interrupt-parent = <&tb10x_ictl>;
 179                         interrupts = <26 1>;
 180                         clocks = <&ahb_clk>;
 181                 };
 182                 spi1: spi@0xFE011000 {
 183                         #address-cells = <1>;
 184                         #size-cells = <0>;
 185                         cell-index = <1>;
 186                         compatible = "abilis,tb100-spi";
 187                         num-cs = <2>;
 188                         reg = <0xFE011000 0x20>;
 189                         interrupt-parent = <&tb10x_ictl>;
 190                         interrupts = <10 1>;
 191                         clocks = <&ahb_clk>;
 192                 };
 193
 194                 tb10x_tsm: tb10x-tsm@ff316000 {
 195                         compatible = "abilis,tb100-tsm";
 196                         reg = <0xff316000 0x400>;
 197                         interrupt-parent = <&tb10x_ictl>;
 198                         interrupts = <17 1>;
 199                         output-clkdiv = <4>;
 200                         global-packet-delay = <0x21>;
 201                         port-packet-delay = <0>;
 202                 };
 203                 tb10x_stream_proc: tb10x-stream-proc {
 204                         compatible = "abilis,tb100-streamproc";
 205                         reg =   <0xfff00000 0x200>,
 206                                 <0x000f0000 0x10000>,
 207                                 <0xfff00200 0x105>,
 208                                 <0xff10600c 0x1>,
 209                                 <0xfe001018 0x1>;
 210                         reg-names =     "mbox",
 211                                         "sp_iccm",
 212                                         "mbox_irq",
 213                                         "cpuctrl",
 214                                         "a6it_int_force";
 215                         interrupt-parent = <&tb10x_ictl>;
 216                         interrupts = <20 1>, <19 1>;
 217                         interrupt-names = "cmd_irq", "event_irq";
 218                 };
 219                 tb10x_mdsc0: tb10x-mdscr@FF300000 {
 220                         compatible = "abilis,tb100-mdscr";
 221                         reg = <0xFF300000 0x7000>;
 222                         tb100-mdscr-manage-tsin;
 223                 };
 224                 tb10x_mscr0: tb10x-mdscr@FF307000 {
 225                         compatible = "abilis,tb100-mdscr";
 226                         reg = <0xFF307000 0x7000>;
 227                 };
 228                 tb10x_scr0: tb10x-mdscr@ff30e000 {
 229                         compatible = "abilis,tb100-mdscr";
 230                         reg = <0xFF30e000 0x4000>;
 231                         tb100-mdscr-manage-tsin;
 232                 };
 233                 tb10x_scr1: tb10x-mdscr@ff312000 {
 234                         compatible = "abilis,tb100-mdscr";
 235                         reg = <0xFF312000 0x4000>;
 236                         tb100-mdscr-manage-tsin;
 237                 };
 238                 tb10x_wfb: tb10x-wfb@ff319000 {
 239                         compatible = "abilis,tb100-wfb";
 240                         reg = <0xff319000 0x1000>;
 241                         interrupt-parent = <&tb10x_ictl>;
 242                         interrupts = <16 1>;
 243                 };
 244         };
 245 };