1 This document describes the i2c protocol. Or will, when it is finished :-)
8 Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
9 A, NA (1 bit) : Accept and reverse accept bit.
10 Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
11 get a 10 bit I2C address.
12 Comm (8 bits): Command byte, a data byte which often selects a register on
14 Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
16 Count (8 bits): A data byte containing the length of a block operation.
18 [..]: Data sent by I2C device, as opposed to data sent by the host adapter.
21 Simple send transaction
22 ======================
24 This corresponds to i2c_master_send.
26 S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
29 Simple receive transaction
30 ===========================
32 This corresponds to i2c_master_recv
34 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
40 This corresponds to i2c_transfer
42 They are just like the above transactions, but instead of a stop bit P
43 a start bit S is sent and the transaction continues. An example of
44 a byte read, followed by a byte write:
46 S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
52 The following modifications to the I2C protocol can also be generated by
53 setting these flags for i2c messages. With the exception of I2C_M_NOSTART, they
54 are usually only needed to work around device issues:
57 Normally message is interrupted immediately if there is [NA] from the
58 client. Setting this flag treats any [NA] as [A], and all of
60 These messages may still fail to SCL lo->hi timeout.
63 In a read message, master A/NA bit is skipped.
66 In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
67 point. For example, setting I2C_M_NOSTART on the second partial message
68 generates something like:
69 S Addr Rd [A] [Data] NA Data [A] P
70 If you set the I2C_M_NOSTART variable for the first partial message,
71 we do not generate Addr, but we do generate the startbit S. This will
72 probably confuse all other clients on your bus, so don't try this.
74 This is often used to gather transmits from multiple data buffers in
75 system memory into something that appears as a single transfer to the
76 I2C device but may also be used between direction changes by some
80 This toggles the Rd/Wr flag. That is, if you want to do a write, but
81 need to emit an Rd instead of a Wr, or vice versa, you set this
83 S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
86 Force a stop condition (P) after the message. Some I2C related protocols
87 like SCCB require that. Normally, you really don't want to get interrupted
88 between the messages of one transfer.