1 * Freescale IMX27 IOMUX Controller
4 - compatible: "fsl,imx27-iomuxc"
6 The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes.
8 Required properties for pin configuration node:
9 - fsl,pins: three integers array, represents a group of pins mux and config
10 setting. The format is fsl,pins = <PIN MUX_ID CONFIG>.
12 PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable
13 configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin
14 number on the specific port (between 0 and 31).
17 function + (direction << 2) + (gpio_oconf << 4) + (gpio_iconfa << 8) + (gpio_iconfb << 10)
19 function value is used to select the pin function.
22 1 - Alternate function
24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
26 direction defines the data direction of the pin.
32 gpio_oconf configures the gpio submodule output signal. This does not
33 have any effect unless GPIO function is selected. A/B/C_IN are output
34 signals of function blocks A,B and C. Specific function blocks are
35 described in the reference manual.
43 gpio_iconfa/b configures the gpio submodule input to functionblocks A and
44 B. GPIO function should be selected if this is configured.
47 1 - Interrupt Status Register
50 Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2
52 CONFIG can be 0 or 1, meaning Pullup disable/enable.
58 iomuxc: iomuxc@10015000 {
59 compatible = "fsl,imx27-iomuxc";
60 reg = <0x10015000 0x600>;
63 pinctrl_uart1: uart-1 {
65 0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */
66 0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */
67 0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */
68 0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */
77 For convenience there are macros defined in imx27-pinfunc.h which provide PIN
78 and MUX_ID. They are structured as MX27_PAD_<Pad name>__<Signal name>. The names
79 are defined in the i.MX27 reference manual.
81 The above example using macros:
83 iomuxc: iomuxc@10015000 {
84 compatible = "fsl,imx27-iomuxc";
85 reg = <0x10015000 0x600>;
88 pinctrl_uart1: uart-1 {
90 MX27_PAD_UART1_TXD__UART1_TXD 0x0
91 MX27_PAD_UART1_RXD__UART1_RXD 0x0
92 MX27_PAD_UART1_CTS__UART1_CTS 0x0
93 MX27_PAD_UART1_RTS__UART1_RTS 0x0