1 STMicroelectronics STi MIPHY365x PHY binding
2 ============================================
4 This binding describes a miphy device that is used to control PHY hardware
7 Required properties (controller (parent) node):
8 - compatible : Should be "st,miphy365x-phy"
9 - st,syscfg : Should be a phandle of the system configuration register group
10 which contain the SATA, PCIe mode setting bits
12 Required nodes : A sub-node is required for each channel the controller
13 provides. Address range information including the usual
14 'reg' and 'reg-names' properties are used inside these
15 nodes to describe the controller's topology. These nodes
16 are translated by the driver's .xlate() function.
18 Required properties (port (child) node):
19 - #phy-cells : Should be 1 (See second example)
20 Cell after port phandle is device type from:
23 - reg : Address and length of register sets for each device in
25 - reg-names : The names of the register addresses corresponding to the
26 registers filled in "reg":
27 - sata: For SATA devices
28 - pcie: For PCIe devices
29 - syscfg: To specify the syscfg based config register
31 Optional properties (port (child) node):
32 - st,sata-gen : Generation of locally attached SATA IP. Expected values
33 are {1,2,3). If not supplied generation 1 hardware will
35 - st,pcie-tx-pol-inv : Bool property to invert the polarity PCIe Tx (Txn/Txp)
36 - st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp)
40 miphy365x_phy: miphy365x@fe382000 {
41 compatible = "st,miphy365x-phy";
42 st,syscfg = <&syscfg_rear>;
47 phy_port0: port@fe382000 {
48 reg = <0xfe382000 0x100>, <0xfe394000 0x100>, <0x824 0x4>;
49 reg-names = "sata", "pcie", "syscfg";
54 phy_port1: port@fe38a000 {
55 reg = <0xfe38a000 0x100>, <0xfe804000 0x100>, <0x828 0x4>;;
56 reg-names = "sata", "pcie", "syscfg";
62 Specifying phy control of devices
63 =================================
65 Device nodes should specify the configuration required in their "phys"
66 property, containing a phandle to the phy port node and a device type.
70 #include <dt-bindings/phy/phy-miphy365x.h>
72 sata0: sata@fe380000 {
74 phys = <&phy_port0 MIPHY_TYPE_SATA>;