1 * Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
5 - "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
6 - "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
7 - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
8 - reg : Should contain I2C/HS-I2C registers location and length
9 - interrupts : Should contain I2C/HS-I2C interrupt
12 - clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
13 The absence of the propoerty indicates the default frequency 100 kHz.
14 - dmas: A list of two dma specifiers, one for each entry in dma-names.
15 - dma-names: should contain "tx" and "rx".
19 i2c@83fc4000 { /* I2C2 on i.MX51 */
20 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
21 reg = <0x83fc4000 0x4000>;
25 i2c@70038000 { /* HS-I2C on i.MX51 */
26 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
27 reg = <0x70038000 0x4000>;
29 clock-frequency = <400000>;
32 i2c0: i2c@40066000 { /* i2c0 on vf610 */
33 compatible = "fsl,vf610-i2c";
34 reg = <0x40066000 0x1000>;
35 interrupts =<0 71 0x04>;
38 dma-names = "rx","tx";